@@ -1361,24 +1361,12 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
return false;
}
- if (!_compute_psr2_sdp_prior_scanline_indication(intel_dp, crtc_state)) {
- drm_dbg_kms(&dev_priv->drm,
- "PSR2 not enabled, PSR2 SDP indication do not fit in hblank\n");
- return false;
- }
-
- if (!intel_alpm_compute_params(intel_dp, crtc_state)) {
- drm_dbg_kms(&dev_priv->drm,
- "PSR2 not enabled, Unable to use long enough wake times\n");
- return false;
- }
-
/* Vblank >= PSR2_CTL Block Count Number maximum line count */
if (crtc_state->hw.adjusted_mode.crtc_vblank_end -
crtc_state->hw.adjusted_mode.crtc_vblank_start <
psr2_block_count_lines(intel_dp)) {
drm_dbg_kms(&dev_priv->drm,
- "PSR2 not enabled, too short vblank time\n");
+ "Selective update not enabled, too short vblank time\n");
return false;
}
@@ -1420,6 +1408,21 @@ static bool intel_sel_update_config_valid(struct intel_dp *intel_dp,
if (!crtc_state->has_panel_replay && !intel_psr2_config_valid(intel_dp, crtc_state))
goto unsupported;
+ if (intel_dp_is_edp(intel_dp)) {
+ if (!_compute_psr2_sdp_prior_scanline_indication(intel_dp,
+ crtc_state)) {
+ drm_dbg_kms(&dev_priv->drm,
+ "Selective update not enabled, SDP indication do not fit in hblank\n");
+ goto unsupported;
+ }
+
+ if (!intel_alpm_compute_params(intel_dp, crtc_state)) {
+ drm_dbg_kms(&dev_priv->drm,
+ "Selective update not enabled, Unable to use long enough wake times\n");
+ goto unsupported;
+ }
+ }
+
if (crtc_state->has_panel_replay && (DISPLAY_VER(dev_priv) < 14 ||
!intel_dp->psr.sink_panel_replay_su_support))
goto unsupported;
eDP1.5 support ALPM with Panel Replay as well. We need to check ALPM related things for Panel Replay as well. Bspec: 68920 v2: do not move Vblank >= PSR2_CTL Block Count Number maximum line count check Signed-off-by: Jouni Högander <jouni.hogander@intel.com> --- drivers/gpu/drm/i915/display/intel_psr.c | 29 +++++++++++++----------- 1 file changed, 16 insertions(+), 13 deletions(-)