@@ -1002,7 +1002,8 @@ static bool vrr_params_changed(const struct intel_crtc_state *old_crtc_state,
old_crtc_state->vrr.vmin != new_crtc_state->vrr.vmin ||
old_crtc_state->vrr.vmax != new_crtc_state->vrr.vmax ||
old_crtc_state->vrr.guardband != new_crtc_state->vrr.guardband ||
- old_crtc_state->vrr.pipeline_full != new_crtc_state->vrr.pipeline_full;
+ old_crtc_state->vrr.pipeline_full != new_crtc_state->vrr.pipeline_full ||
+ old_crtc_state->vrr.fixed_rr != new_crtc_state->vrr.fixed_rr;
}
static bool vrr_enabling(const struct intel_crtc_state *old_crtc_state,
@@ -5425,6 +5426,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
if (!fastset) {
PIPE_CONF_CHECK_BOOL(vrr.enable);
+ PIPE_CONF_CHECK_BOOL(vrr.fixed_rr);
PIPE_CONF_CHECK_I(vrr.vmin);
PIPE_CONF_CHECK_I(vrr.vmax);
PIPE_CONF_CHECK_I(vrr.flipline);
@@ -1395,7 +1395,7 @@ struct intel_crtc_state {
/* Variable Refresh Rate state */
struct {
- bool enable, in_range;
+ bool enable, in_range, fixed_rr;
u8 pipeline_full;
u16 flipline, vmin, vmax, guardband;
u32 vsync_end, vsync_start;
@@ -321,6 +321,9 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state)
TRANS_VRR_VMAX(dev_priv, cpu_transcoder)) + 1;
crtc_state->vrr.vmin = intel_de_read(dev_priv,
TRANS_VRR_VMIN(dev_priv, cpu_transcoder)) + 1;
+ if (crtc_state->vrr.vmax == crtc_state->vrr.flipline &&
+ crtc_state->vrr.vmin == crtc_state->vrr.flipline)
+ crtc_state->vrr.fixed_rr = true;
}
if (crtc_state->vrr.enable) {
Add fixed_rr member to struct vrr to represent the case where a fixed refresh rate with VRR timing generator is required. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 4 +++- drivers/gpu/drm/i915/display/intel_display_types.h | 2 +- drivers/gpu/drm/i915/display/intel_vrr.c | 3 +++ 3 files changed, 7 insertions(+), 2 deletions(-)