From patchwork Wed Jun 5 10:25:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Hogander, Jouni" X-Patchwork-Id: 13686567 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CF579C25B76 for ; Wed, 5 Jun 2024 10:26:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 318ED10E5C1; Wed, 5 Jun 2024 10:26:39 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="jrdofU1N"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3A6DD10E738 for ; Wed, 5 Jun 2024 10:26:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1717583194; x=1749119194; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=azDS0aujQ3wRVAgzaDxd9gpPpi6TJybPIWXPCn0AEJs=; b=jrdofU1Nkxu89yvBuyl2SpK5e8qO2Xq0q4q8MPoXN9rTColaFIIxisaY dHby7zLXQi9BAuIcs+w1AFuTazrxhH5aj3djmk0xXiImdQ/w4M4Fk+b4h Me3jcOIo5lNFKhKggB32vg1I8rvnYzv5ZtYA7cDBznHJyaB9xcWOqAm7j dj5OC4f+S2G8iTSneJrDwGKIcRYi1DKxWpQpSDLlpIMTkzvBZfMcvNvBw 7ktFlSO8A32dJCscL1A99EewzxDwTeANHBE7iSI8mkVQtBFSoMRgtd1yK f40gtlvaE8MeC0OTfcZHbaryKkcMI+oeC47Lt1JGpAxVEyilMx7yA/1IA Q==; X-CSE-ConnectionGUID: 6DY6o0TfQ/iJEGMjjPlPPw== X-CSE-MsgGUID: 6lg75vOxQpO+cfdEKxnJ7Q== X-IronPort-AV: E=McAfee;i="6600,9927,11093"; a="14136110" X-IronPort-AV: E=Sophos;i="6.08,216,1712646000"; d="scan'208";a="14136110" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Jun 2024 03:26:33 -0700 X-CSE-ConnectionGUID: yQBlLOlsQzKD94mK0REXhg== X-CSE-MsgGUID: FFAIdenjTMyCcP71f2+JLQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,216,1712646000"; d="scan'208";a="68686160" Received: from amokrov-mobl1.ccr.corp.intel.com (HELO jhogande-mobl1.intel.com) ([10.249.37.49]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Jun 2024 03:26:32 -0700 From: =?utf-8?q?Jouni_H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org Cc: animesh.manna@intel.com, mika.kahola@intel.com, =?utf-8?q?Jouni_H=C3=B6g?= =?utf-8?q?ander?= Subject: [PATCH v6 08/26] drm/i915/psr: Use intel_alpm_aux_wake_supported instead of local variable Date: Wed, 5 Jun 2024 13:25:35 +0300 Message-Id: <20240605102553.187309-9-jouni.hogander@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240605102553.187309-1-jouni.hogander@intel.com> References: <20240605102553.187309-1-jouni.hogander@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" We have now intel_alpm_aux_wake_supported. Use that instead of local variable. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_psr.c | 14 ++------------ 1 file changed, 2 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 3cc38ba2f954..a3ad4488fcee 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -446,16 +446,6 @@ void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir) } } -static bool intel_dp_get_alpm_status(struct intel_dp *intel_dp) -{ - u8 alpm_caps = 0; - - if (drm_dp_dpcd_readb(&intel_dp->aux, DP_RECEIVER_ALPM_CAP, - &alpm_caps) != 1) - return false; - return alpm_caps & DP_ALPM_CAP; -} - static u8 intel_dp_get_sink_sync_latency(struct intel_dp *intel_dp) { struct drm_i915_private *i915 = dp_to_i915(intel_dp); @@ -600,7 +590,6 @@ static void _psr_init_dpcd(struct intel_dp *intel_dp) intel_dp->psr_dpcd[0] >= DP_PSR2_WITH_Y_COORD_IS_SUPPORTED) { bool y_req = intel_dp->psr_dpcd[1] & DP_PSR2_SU_Y_COORDINATE_REQUIRED; - bool alpm = intel_dp_get_alpm_status(intel_dp); /* * All panels that supports PSR version 03h (PSR2 + @@ -613,7 +602,8 @@ static void _psr_init_dpcd(struct intel_dp *intel_dp) * Y-coordinate requirement panels we would need to enable * GTC first. */ - intel_dp->psr.sink_psr2_support = y_req && alpm; + intel_dp->psr.sink_psr2_support = y_req && + intel_alpm_aux_wake_supported(intel_dp); drm_dbg_kms(&i915->drm, "PSR2 %ssupported\n", intel_dp->psr.sink_psr2_support ? "" : "not "); }