From patchwork Fri Jun 14 15:35:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andr=C3=A9_Almeida?= X-Patchwork-Id: 13698853 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CCD16C27C77 for ; Fri, 14 Jun 2024 15:36:14 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4676010EDA2; Fri, 14 Jun 2024 15:36:10 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=igalia.com header.i=@igalia.com header.b="aFh82x5B"; dkim-atps=neutral Received: from fanzine2.igalia.com (fanzine.igalia.com [178.60.130.6]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7941410ED9B; Fri, 14 Jun 2024 15:36:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=kmzOSqTKJaH0dvCeP0l9yACALP9ZDMY12Vpbbl/oZpo=; b=aFh82x5B16HfjMQDExiRAYOAAm f+p+YESYJxmGdkjJJFXxIDhcYx424j/smaqMdz5/3/77aQOwxYLMkU3TAiDIHnWA3uZbeVh+KJ3sG fZLfCLiAazI7zvQfh3PgDOBn3lC7zkMFUX+1P8dETPjZUtjjT5je5ozkwzmWO9uQJAV+1B3FVqHfj fJrMwntYMkrFJS+a0THptww0VlUiKdUlXTqyKCVNZGDmYVMBgCC4mvFPLMDCih6mtCipLYaOqMxhV C/BP6hP0UqoVg8a0V6OfZJyi5xnvMZNwv7vZ6GOHhLn6EpJuxPcmnoF3Hd+lUHHJNBUD5cfKaV8Po phSrk10g==; Received: from [179.118.191.115] (helo=localhost.localdomain) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1sI8yA-003B8v-5N; Fri, 14 Jun 2024 17:36:02 +0200 From: =?utf-8?q?Andr=C3=A9_Almeida?= To: dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, nouveau@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: kernel-dev@igalia.com, Melissa Wen , alexander.deucher@amd.com, christian.koenig@amd.com, Simon Ser , Pekka Paalanen , daniel@ffwll.ch, Daniel Stone , =?utf-8?b?J01hcmVr?= =?utf-8?b?IE9sxaHDoWsn?= , Dave Airlie , ville.syrjala@linux.intel.com, Xaver Hugl , Joshua Ashton , =?utf-8?q?Michel_D=C3=A4nzer?= , Sam Ravnborg , Boris Brezillon , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Jani Nikula , Rodrigo Vivi , Karol Herbst , Lyude Paul , =?utf-8?q?Andr=C3=A9_Almeida?= Subject: [PATCH v6 2/8] drm: Support per-plane async flip configuration Date: Fri, 14 Jun 2024 12:35:29 -0300 Message-ID: <20240614153535.351689-3-andrealmeid@igalia.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240614153535.351689-1-andrealmeid@igalia.com> References: <20240614153535.351689-1-andrealmeid@igalia.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Drivers have different capabilities on what plane types they can or cannot perform async flips. Create a plane::async_flip field so each driver can choose which planes they allow doing async flips. Signed-off-by: André Almeida --- drivers/gpu/drm/drm_atomic_uapi.c | 4 ++-- include/drm/drm_plane.h | 5 +++++ 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c index 2e1d9391febe..ed1af3455477 100644 --- a/drivers/gpu/drm/drm_atomic_uapi.c +++ b/drivers/gpu/drm/drm_atomic_uapi.c @@ -1079,9 +1079,9 @@ int drm_atomic_set_property(struct drm_atomic_state *state, break; } - if (async_flip && plane_state->plane->type != DRM_PLANE_TYPE_PRIMARY) { + if (async_flip && !plane->async_flip) { drm_dbg_atomic(prop->dev, - "[OBJECT:%d] Only primary planes can be changed during async flip\n", + "[PLANE:%d] does not support async flips\n", obj->id); ret = -EINVAL; break; diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h index 9507542121fa..0bebc72af5c3 100644 --- a/include/drm/drm_plane.h +++ b/include/drm/drm_plane.h @@ -786,6 +786,11 @@ struct drm_plane { * @kmsg_panic: Used to register a panic notifier for this plane */ struct kmsg_dumper kmsg_panic; + + /** + * @async_flip: indicates if a plane can do async flips + */ + bool async_flip; }; #define obj_to_plane(x) container_of(x, struct drm_plane, base)