Message ID | 20240702055631.3722013-2-animesh.manna@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v8,1/2] drm/i915/panelreplay: Panel replay workaround with VRR | expand |
On Tue, 2024-07-02 at 11:26 +0530, Animesh Manna wrote: > Bspec: 71956 > > The SCL window (i.e. Window 2) must be non-zero if using > VRR + PSR1/PSR2/PR. I don't see any reason to have this as a separate patch. Squash to previous and modify subject and commit description of the patch. BR, Jouni Högander > > Signed-off-by: Animesh Manna <animesh.manna@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c > b/drivers/gpu/drm/i915/display/intel_display.c > index cdab71f81eaa..05462af6805f 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -3946,12 +3946,12 @@ void intel_crtc_adjust_vblank_delay(struct > intel_crtc_state *crtc_state, > /* > * wa_14015401596 for display versions 13, 14. > * Program Set Context Latency in TRANS_SET_CONTEXT_LATENCY > register > - * to at least a value of 1 when Panel Replay is enabled with > VRR. > + * to at least a value of 1 when PSR1/PSR2/Panel Replay is > enabled with VRR. > * Value for TRANS_SET_CONTEXT_LATENCY is calculated by > substracting > * crtc_vdisplay from crtc_vblank_start, so incrementing > crtc_vblank_start > * by 1 if both are equal. > */ > - if (crtc_state->vrr.enable && crtc_state->has_panel_replay && > + if (crtc_state->vrr.enable && crtc_state->has_psr && > adjusted_mode->crtc_vblank_start == adjusted_mode- > >crtc_vdisplay && > IS_DISPLAY_VER(to_i915(crtc->base.dev), 13, 14)) > adjusted_mode->crtc_vblank_start += 1;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index cdab71f81eaa..05462af6805f 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -3946,12 +3946,12 @@ void intel_crtc_adjust_vblank_delay(struct intel_crtc_state *crtc_state, /* * wa_14015401596 for display versions 13, 14. * Program Set Context Latency in TRANS_SET_CONTEXT_LATENCY register - * to at least a value of 1 when Panel Replay is enabled with VRR. + * to at least a value of 1 when PSR1/PSR2/Panel Replay is enabled with VRR. * Value for TRANS_SET_CONTEXT_LATENCY is calculated by substracting * crtc_vdisplay from crtc_vblank_start, so incrementing crtc_vblank_start * by 1 if both are equal. */ - if (crtc_state->vrr.enable && crtc_state->has_panel_replay && + if (crtc_state->vrr.enable && crtc_state->has_psr && adjusted_mode->crtc_vblank_start == adjusted_mode->crtc_vdisplay && IS_DISPLAY_VER(to_i915(crtc->base.dev), 13, 14)) adjusted_mode->crtc_vblank_start += 1;
Bspec: 71956 The SCL window (i.e. Window 2) must be non-zero if using VRR + PSR1/PSR2/PR. Signed-off-by: Animesh Manna <animesh.manna@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)