diff mbox series

[14/20] drm/i915/fbc: Introduce intel_fbc_preferred_cfb_size()

Message ID 20240705145254.3355-15-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series drm/{i915, xe}: FBC cleanups + tweak fbdev stolen usage | expand

Commit Message

Ville Syrjälä July 5, 2024, 2:52 p.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Allow the code to declare roughly how much stolen memory
should remain available for the CFB. Since we don't know
the actual resolutions that will eventually be used simply
assume that the maximum plane size (with no extra stride
padding) is enough, with 1:1 compression ratio limit.

This should be useful for the fbdev code to determine
whether to allocate/keep the fbdev framebuffer in stolen
or not.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 17 +++++++++++++++++
 drivers/gpu/drm/i915/display/intel_fbc.h |  1 +
 2 files changed, 18 insertions(+)

Comments

Shankar, Uma July 10, 2024, 8:36 a.m. UTC | #1
> -----Original Message-----
> From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Friday, July 5, 2024 8:23 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: intel-xe@lists.freedesktop.org
> Subject: [PATCH 14/20] drm/i915/fbc: Introduce intel_fbc_preferred_cfb_size()
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Allow the code to declare roughly how much stolen memory should remain
> available for the CFB. Since we don't know the actual resolutions that will
> eventually be used simply assume that the maximum plane size (with no extra
> stride
> padding) is enough, with 1:1 compression ratio limit.
> 
> This should be useful for the fbdev code to determine whether to allocate/keep
> the fbdev framebuffer in stolen or not.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 17 +++++++++++++++++
> drivers/gpu/drm/i915/display/intel_fbc.h |  1 +
>  2 files changed, 18 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index a0e539bc80f1..efe0a554a281 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1911,6 +1911,23 @@ static int intel_sanitize_fbc_option(struct
> intel_display *display)
>  	return 0;
>  }
> 
> +unsigned int intel_fbc_preferred_cfb_size(struct intel_display
> +*display) {
> +	unsigned int cpp, width, height, stride;
> +
> +	if (!HAS_FBC(display))
> +		return 0;
> +
> +	intel_fbc_max_plane_size(display, &width, &height);
> +
> +	cpp = intel_fbc_cfb_cpp();
> +
> +	/* assume stride matches width to keep this simple */
> +	stride = _intel_fbc_cfb_stride(display, cpp, width, width * cpp);
> +
> +	return _intel_fbc_cfb_size(display, height, stride); }
> +
>  void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane *plane)  {
>  	plane->fbc = fbc;
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.h
> b/drivers/gpu/drm/i915/display/intel_fbc.h
> index 834b271505b1..40d8efec6d9d 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.h
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.h
> @@ -46,6 +46,7 @@ void intel_fbc_flush(struct drm_i915_private *dev_priv,
> void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane *plane);  void
> intel_fbc_handle_fifo_underrun_irq(struct intel_display *display);  void
> intel_fbc_reset_underrun(struct intel_display *display);
> +unsigned int intel_fbc_preferred_cfb_size(struct intel_display
> +*display);
>  void intel_fbc_crtc_debugfs_add(struct intel_crtc *crtc);  void
> intel_fbc_debugfs_register(struct intel_display *display);
> 
> --
> 2.44.2
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index a0e539bc80f1..efe0a554a281 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1911,6 +1911,23 @@  static int intel_sanitize_fbc_option(struct intel_display *display)
 	return 0;
 }
 
+unsigned int intel_fbc_preferred_cfb_size(struct intel_display *display)
+{
+	unsigned int cpp, width, height, stride;
+
+	if (!HAS_FBC(display))
+		return 0;
+
+	intel_fbc_max_plane_size(display, &width, &height);
+
+	cpp = intel_fbc_cfb_cpp();
+
+	/* assume stride matches width to keep this simple */
+	stride = _intel_fbc_cfb_stride(display, cpp, width, width * cpp);
+
+	return _intel_fbc_cfb_size(display, height, stride);
+}
+
 void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane *plane)
 {
 	plane->fbc = fbc;
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.h b/drivers/gpu/drm/i915/display/intel_fbc.h
index 834b271505b1..40d8efec6d9d 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.h
+++ b/drivers/gpu/drm/i915/display/intel_fbc.h
@@ -46,6 +46,7 @@  void intel_fbc_flush(struct drm_i915_private *dev_priv,
 void intel_fbc_add_plane(struct intel_fbc *fbc, struct intel_plane *plane);
 void intel_fbc_handle_fifo_underrun_irq(struct intel_display *display);
 void intel_fbc_reset_underrun(struct intel_display *display);
+unsigned int intel_fbc_preferred_cfb_size(struct intel_display *display);
 void intel_fbc_crtc_debugfs_add(struct intel_crtc *crtc);
 void intel_fbc_debugfs_register(struct intel_display *display);