diff mbox series

[07/20] drm/i915/fbc: Adjust g4x+ platform checks

Message ID 20240705145254.3355-8-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series drm/{i915, xe}: FBC cleanups + tweak fbdev stolen usage | expand

Commit Message

Ville Syrjälä July 5, 2024, 2:52 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Do the "is this ilk+ or g4x" checks in the customary order instead
of the reverse order. Easier for the poor brain to parse this
when it's always done the same way.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Rodrigo Vivi July 9, 2024, 7:54 p.m. UTC | #1 
On Fri, Jul 05, 2024 at 05:52:41PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Do the "is this ilk+ or g4x" checks in the customary order instead
> of the reverse order. Easier for the poor brain to parse this
> when it's always done the same way.

my poor and lazy brain thanks this!
I would likely stop reading at 'G4' if trying to read code for newer
platforms...

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 40a3b4937dc5..5ba3d8797243 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1087,7 +1087,7 @@ static void intel_fbc_max_surface_size(struct intel_display *display,
>  	} else if (DISPLAY_VER(display) >= 7) {
>  		*w = 4096;
>  		*h = 4096;
> -	} else if (IS_G4X(i915) || DISPLAY_VER(display) >= 5) {
> +	} else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915)) {
>  		*w = 4096;
>  		*h = 2048;
>  	} else {
> @@ -1128,7 +1128,7 @@ static void intel_fbc_max_plane_size(struct intel_display *display,
>  	} else if (DISPLAY_VER(display) >= 8 || IS_HASWELL(i915)) {
>  		*w = 4096;
>  		*h = 4096;
> -	} else if (IS_G4X(i915) || DISPLAY_VER(display) >= 5) {
> +	} else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915)) {
>  		*w = 4096;
>  		*h = 2048;
>  	} else {
> -- 
> 2.44.2
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 40a3b4937dc5..5ba3d8797243 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1087,7 +1087,7 @@  static void intel_fbc_max_surface_size(struct intel_display *display,
 	} else if (DISPLAY_VER(display) >= 7) {
 		*w = 4096;
 		*h = 4096;
-	} else if (IS_G4X(i915) || DISPLAY_VER(display) >= 5) {
+	} else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915)) {
 		*w = 4096;
 		*h = 2048;
 	} else {
@@ -1128,7 +1128,7 @@  static void intel_fbc_max_plane_size(struct intel_display *display,
 	} else if (DISPLAY_VER(display) >= 8 || IS_HASWELL(i915)) {
 		*w = 4096;
 		*h = 4096;
-	} else if (IS_G4X(i915) || DISPLAY_VER(display) >= 5) {
+	} else if (DISPLAY_VER(display) >= 5 || IS_G4X(i915)) {
 		*w = 4096;
 		*h = 2048;
 	} else {