| Message ID | 20240705145254.3355-9-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/{i915, xe}: FBC cleanups + tweak fbdev stolen usage | expand |
> -----Original Message----- > From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala > Sent: Friday, July 5, 2024 8:23 PM > To: intel-gfx@lists.freedesktop.org > Cc: intel-xe@lists.freedesktop.org > Subject: [PATCH 08/20] drm/i915/fbc: Extract _intel_fbc_cfb_stride() > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Pull the lower level stuff out from intel_fbc_cfb_stride() into a separate function > that doesn't depend on the plane_state. Looks Good to me. Reviewed-by: Uma Shankar <uma.shankar@intel.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/display/intel_fbc.c | 22 ++++++++++++++-------- > 1 file changed, 14 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c > b/drivers/gpu/drm/i915/display/intel_fbc.c > index 5ba3d8797243..4a9321f5218f 100644 > --- a/drivers/gpu/drm/i915/display/intel_fbc.c > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c > @@ -149,12 +149,11 @@ static unsigned int intel_fbc_plane_cfb_stride(const > struct intel_plane_state *p } > > /* minimum acceptable cfb stride in bytes, assuming 1:1 compression limit */ - > static unsigned int skl_fbc_min_cfb_stride(const struct intel_plane_state > *plane_state) > +static unsigned int skl_fbc_min_cfb_stride(struct intel_display *display, > + unsigned int width) > { > - struct intel_display *display = to_intel_display(plane_state->uapi.plane- > >dev); > unsigned int limit = 4; /* 1:4 compression limit is the worst case */ > unsigned int cpp = 4; /* FBC always 4 bytes per pixel */ > - unsigned int width = drm_rect_width(&plane_state->uapi.src) >> 16; > unsigned int height = 4; /* FBC segment is 4 lines */ > unsigned int stride; > > @@ -179,22 +178,29 @@ static unsigned int skl_fbc_min_cfb_stride(const struct > intel_plane_state *plane } > > /* properly aligned cfb stride in bytes, assuming 1:1 compression limit */ -static > unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_state) > +static unsigned int _intel_fbc_cfb_stride(struct intel_display *display, > + unsigned int width, unsigned int stride) > { > - struct intel_display *display = to_intel_display(plane_state->uapi.plane- > >dev); > - unsigned int stride = intel_fbc_plane_cfb_stride(plane_state); > - > /* > * At least some of the platforms require each 4 line segment to > * be 512 byte aligned. Aligning each line to 512 bytes guarantees > * that regardless of the compression limit we choose later. > */ > if (DISPLAY_VER(display) >= 9) > - return max(ALIGN(stride, 512), > skl_fbc_min_cfb_stride(plane_state)); > + return max(ALIGN(stride, 512), skl_fbc_min_cfb_stride(display, > +width)); > else > return stride; > } > > +static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state > +*plane_state) { > + struct intel_display *display = to_intel_display(plane_state->uapi.plane- > >dev); > + unsigned int stride = intel_fbc_plane_cfb_stride(plane_state); > + unsigned int width = drm_rect_width(&plane_state->uapi.src) >> 16; > + > + return _intel_fbc_cfb_stride(display, width, stride); } > + > static unsigned int intel_fbc_cfb_size(const struct intel_plane_state > *plane_state) { > struct intel_display *display = to_intel_display(plane_state->uapi.plane- > >dev); > -- > 2.44.2
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c index 5ba3d8797243..4a9321f5218f 100644 --- a/drivers/gpu/drm/i915/display/intel_fbc.c +++ b/drivers/gpu/drm/i915/display/intel_fbc.c @@ -149,12 +149,11 @@ static unsigned int intel_fbc_plane_cfb_stride(const struct intel_plane_state *p } /* minimum acceptable cfb stride in bytes, assuming 1:1 compression limit */ -static unsigned int skl_fbc_min_cfb_stride(const struct intel_plane_state *plane_state) +static unsigned int skl_fbc_min_cfb_stride(struct intel_display *display, + unsigned int width) { - struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev); unsigned int limit = 4; /* 1:4 compression limit is the worst case */ unsigned int cpp = 4; /* FBC always 4 bytes per pixel */ - unsigned int width = drm_rect_width(&plane_state->uapi.src) >> 16; unsigned int height = 4; /* FBC segment is 4 lines */ unsigned int stride; @@ -179,22 +178,29 @@ static unsigned int skl_fbc_min_cfb_stride(const struct intel_plane_state *plane } /* properly aligned cfb stride in bytes, assuming 1:1 compression limit */ -static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_state) +static unsigned int _intel_fbc_cfb_stride(struct intel_display *display, + unsigned int width, unsigned int stride) { - struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev); - unsigned int stride = intel_fbc_plane_cfb_stride(plane_state); - /* * At least some of the platforms require each 4 line segment to * be 512 byte aligned. Aligning each line to 512 bytes guarantees * that regardless of the compression limit we choose later. */ if (DISPLAY_VER(display) >= 9) - return max(ALIGN(stride, 512), skl_fbc_min_cfb_stride(plane_state)); + return max(ALIGN(stride, 512), skl_fbc_min_cfb_stride(display, width)); else return stride; } +static unsigned int intel_fbc_cfb_stride(const struct intel_plane_state *plane_state) +{ + struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev); + unsigned int stride = intel_fbc_plane_cfb_stride(plane_state); + unsigned int width = drm_rect_width(&plane_state->uapi.src) >> 16; + + return _intel_fbc_cfb_stride(display, width, stride); +} + static unsigned int intel_fbc_cfb_size(const struct intel_plane_state *plane_state) { struct intel_display *display = to_intel_display(plane_state->uapi.plane->dev);