diff mbox series

[v2,3/6] drm/i915/dp: Reset cached LTTPR count if number of LTTPRs is unsupported

Message ID 20240708190029.271247-4-imre.deak@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/dp: Fix LTTPR detection | expand

Commit Message

Imre Deak July 8, 2024, 7 p.m. UTC 
After detection the cached LTTPR count can be checked to determine if
LTTPRs in non-transparent mode were detected. Reset the cached LTTPR
count if the reported number of LTTPRs is invalid to ensure the above
checks work as expected.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp_link_training.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Nautiyal, Ankit K July 11, 2024, 9:41 a.m. UTC | #1 
LGTM.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

On 7/9/2024 12:30 AM, Imre Deak wrote:
> After detection the cached LTTPR count can be checked to determine if
> LTTPRs in non-transparent mode were detected. Reset the cached LTTPR
> count if the reported number of LTTPRs is invalid to ensure the above
> checks work as expected.
>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_dp_link_training.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> index d044c8e36bb3d..56b9c5cb1254d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> @@ -174,7 +174,7 @@ static int intel_dp_init_lttpr_phys(struct intel_dp *intel_dp, const u8 dpcd[DP_
>   	 * still taking into account any LTTPR common lane- rate/count limits.
>   	 */
>   	if (lttpr_count < 0)
> -		return 0;
> +		goto out_reset_lttpr_count;
>   
>   	if (!intel_dp_set_lttpr_transparent_mode(intel_dp, false)) {
>   		lt_dbg(intel_dp, DP_PHY_DPRX,
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index d044c8e36bb3d..56b9c5cb1254d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -174,7 +174,7 @@  static int intel_dp_init_lttpr_phys(struct intel_dp *intel_dp, const u8 dpcd[DP_
 	 * still taking into account any LTTPR common lane- rate/count limits.
 	 */
 	if (lttpr_count < 0)
-		return 0;
+		goto out_reset_lttpr_count;
 
 	if (!intel_dp_set_lttpr_transparent_mode(intel_dp, false)) {
 		lt_dbg(intel_dp, DP_PHY_DPRX,