diff mbox series

drm/i915/dpmst: Enable VSC SDP for DPMST

Message ID 20240717052247.3452537-1-suraj.kandpal@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/dpmst: Enable VSC SDP for DPMST | expand

Commit Message

Kandpal, Suraj July 17, 2024, 5:22 a.m. UTC
Enable VSC SDP for DPMST since after addition of panel replay has_psr
gets set in DPMST scenarios because of which we do not clear VSC SDP
which causes infoframes.enable

Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c    | 4 ++--
 drivers/gpu/drm/i915/display/intel_dp.c     | 6 +++---
 drivers/gpu/drm/i915/display/intel_dp.h     | 3 +++
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 6 ++++++
 4 files changed, 14 insertions(+), 5 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index a07aca96e551..854152ab5642 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3471,8 +3471,6 @@  static void intel_ddi_update_pipe_dp(struct intel_atomic_state *state,
 {
 	intel_ddi_set_dp_msa(crtc_state, conn_state);
 
-	intel_dp_set_infoframes(encoder, true, crtc_state, conn_state);
-
 	intel_backlight_update(state, encoder, crtc_state, conn_state);
 	drm_connector_update_privacy_screen(conn_state);
 }
@@ -3488,6 +3486,8 @@  void intel_ddi_update_pipe(struct intel_atomic_state *state,
 		intel_ddi_update_pipe_dp(state, encoder, crtc_state,
 					 conn_state);
 
+	if (intel_encoder_is_dp(encoder) || intel_encoder_is_mst(encoder))
+		intel_dp_set_infoframes(encoder, true, crtc_state, conn_state);
 	intel_hdcp_update_pipe(state, encoder, crtc_state, conn_state);
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index edfb30857479..d294fed22525 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2640,9 +2640,9 @@  static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp,
 	}
 }
 
-static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp,
-				     struct intel_crtc_state *crtc_state,
-				     const struct drm_connector_state *conn_state)
+void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp,
+			      struct intel_crtc_state *crtc_state,
+			      const struct drm_connector_state *conn_state)
 {
 	struct drm_dp_vsc_sdp *vsc;
 
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 9be539edf817..7eea3cfdad44 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -201,5 +201,8 @@  intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp,
 
 void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, struct intel_connector *connector);
 bool intel_dp_has_gamut_metadata_dip(struct intel_encoder *encoder);
+void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp,
+			      struct intel_crtc_state *crtc_state,
+			      const struct drm_connector_state *conn_state);
 
 #endif /* __INTEL_DP_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 27ce5c3f5951..a674cf761524 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -662,6 +662,9 @@  static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
 
 	intel_psr_compute_config(intel_dp, pipe_config, conn_state);
 
+	/* TODO: Add other SDP computes here as well */
+	intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
+
 	return intel_dp_tunnel_atomic_compute_stream_bw(state, intel_dp, connector,
 							pipe_config);
 }
@@ -1274,6 +1277,9 @@  static void intel_mst_enable_dp(struct intel_atomic_state *state,
 		intel_crtc_vblank_on(pipe_crtc_state);
 	}
 
+	if (!dig_port->lspcon.active || intel_dp_has_hdmi_sink(&dig_port->dp))
+		intel_dp_set_infoframes(encoder, true, pipe_config, conn_state);
+
 	intel_hdcp_enable(state, encoder, pipe_config, conn_state);
 }