From patchwork Mon Jul 22 06:44:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kandpal, Suraj" X-Patchwork-Id: 13738353 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BDEFAC3DA5D for ; Mon, 22 Jul 2024 06:47:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0E07E10E388; Mon, 22 Jul 2024 06:47:27 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="aXGrivUC"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) by gabe.freedesktop.org (Postfix) with ESMTPS id C382F10E37D; Mon, 22 Jul 2024 06:47:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1721630844; x=1753166844; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VDm2z+0UFsY9+5jVlvAV2utSDLJbFzf/sz/4dn0G6LM=; b=aXGrivUC00gdjv8q8zLyu0D+Optq3YGRKPz4x1ugiYWEWKoGOidd+QW7 YTy/hdAmj3o7eLlwJsQPA7ro42EbCncObnpl/7vIlbimy9DAnDWhbgiU+ 4NpagIB9C/wUSzyaZYXjv3v+ruNOWDQHS30JoYuOsei5tJv/W/F31h2zX 604f6lFP8QirwT4zLB718nchlovkkUtanopO3BEE67BfAGzw/1AVtg86W NBUWG2wB2k2bXey0EF8ZOXW+itS0gcszVadmIKADt1S9JxhE+d755zuS6 NJ5nQnzQonDYE3IENWzdRFo6Zv/uM0JORNy4ZqrcFQiY2t1oZzFcrz7Wu w==; X-CSE-ConnectionGUID: 95mwdNDpRk6C9iQc8NrfAA== X-CSE-MsgGUID: 4sHvpCQSRNqPRWMHyWRfSA== X-IronPort-AV: E=McAfee;i="6700,10204,11140"; a="18798187" X-IronPort-AV: E=Sophos;i="6.09,227,1716274800"; d="scan'208";a="18798187" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by fmvoesa112.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jul 2024 23:47:23 -0700 X-CSE-ConnectionGUID: vg9pjzfTT9uBTgEaW/djdA== X-CSE-MsgGUID: brL8zWG6QIayp2z7vvtw2A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.09,227,1716274800"; d="scan'208";a="51670562" Received: from kandpal-x299-ud4-pro.iind.intel.com ([10.190.239.32]) by fmviesa008.fm.intel.com with ESMTP; 21 Jul 2024 23:47:21 -0700 From: Suraj Kandpal To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: ankit.k.nautiyal@intel.com, Suraj Kandpal Subject: [PATCH 3/3] drm/xe/hdcp: Check GSC structure validity Date: Mon, 22 Jul 2024 12:14:51 +0530 Message-ID: <20240722064451.3610512-4-suraj.kandpal@intel.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20240722064451.3610512-1-suraj.kandpal@intel.com> References: <20240722064451.3610512-1-suraj.kandpal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Sometimes xe_gsc is not initialized when checked at HDCP capability check. Add gsc structure check to avoid null pointer error. Signed-off-by: Suraj Kandpal Reviewed-by: Dnyaneshwar Bhadane --- drivers/gpu/drm/xe/display/xe_hdcp_gsc.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c b/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c index 990285aa9b26..0af667ebebf9 100644 --- a/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c +++ b/drivers/gpu/drm/xe/display/xe_hdcp_gsc.c @@ -40,10 +40,14 @@ bool intel_hdcp_gsc_check_status(struct xe_device *xe) { struct xe_tile *tile = xe_device_get_root_tile(xe); struct xe_gt *gt = tile->media_gt; + struct xe_gsc *gsc = >->uc.gsc; bool ret = true; - if (!xe_uc_fw_is_enabled(>->uc.gsc.fw)) + if (!gsc && !xe_uc_fw_is_enabled(&gsc->fw)) { + drm_dbg_kms(&xe->drm, + "GSC Components not ready for HDCP2.x\n"); return false; + } xe_pm_runtime_get(xe); if (xe_force_wake_get(gt_to_fw(gt), XE_FW_GSC)) { @@ -53,7 +57,7 @@ bool intel_hdcp_gsc_check_status(struct xe_device *xe) goto out; } - if (!xe_gsc_proxy_init_done(>->uc.gsc)) + if (!xe_gsc_proxy_init_done(gsc)) ret = false; xe_force_wake_put(gt_to_fw(gt), XE_FW_GSC);