| Message ID | 20240805062538.1844291-3-nemesa.garg@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Consider joiner calculation for panel fitting | expand |
On 8/5/2024 11:55 AM, Nemesa Garg wrote: > In panel fitter/pipe scaler scenario the pch_pfit configuration > currently takes place before accounting for pipe_src width for > joiner. This causes issue when pch_pfit and joiner get enabled > together. > > Introduce a new boolean flag is_required which can be filled > during dp compute_config and later is used to compute panel_fitting in > pipe_config. This is now only being done when joiner is required. For no-joiner case, the flow remains same. > Modify pch_panel_fitting to handle joiner pipes by adjusting > crtc_hdisplay accordingly. Lets maintain version history of the patch. > > Signed-off-by: Nemesa Garg <nemesa.garg@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 11 +++++++++++ > drivers/gpu/drm/i915/display/intel_display_types.h | 1 + > drivers/gpu/drm/i915/display/intel_dp.c | 11 ++++++++--- > drivers/gpu/drm/i915/display/intel_panel.c | 3 +++ > 4 files changed, 23 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index 8bbde03f2508..a7194a84b6b8 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -4796,6 +4796,17 @@ intel_modeset_pipe_config(struct intel_atomic_state *state, > return ret; > } > > + for_each_new_connector_in_state(&state->base, connector, connector_state, i) { > + if (connector_state->crtc != &crtc->base) > + continue; > + > + if (crtc_state->pch_pfit.is_required) { > + ret = intel_panel_fitting(crtc_state, connector_state); > + if (ret) > + return ret; > + } > + } > + > /* Dithering seems to not pass-through bits correctly when it should, so > * only enable it on 6bpc panels and when its not a compliance > * test requesting 6bpc video pattern. > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h > index a04d52dbf6e1..a4ab26d8fa43 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_types.h > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h > @@ -1258,6 +1258,7 @@ struct intel_crtc_state { > struct drm_rect dst; > bool enabled; > bool force_thru; > + bool is_required; I think this flag is now very specific to joiner case so need to have a better name to reflect the same. > } pch_pfit; > > /* FDI configuration, only valid if has_pch_encoder is set. */ > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c > index 65182bf69b62..4b707d029206 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -2953,9 +2953,14 @@ intel_dp_compute_config(struct intel_encoder *encoder, > > if ((intel_dp_is_edp(intel_dp) && fixed_mode) || > pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) { > - ret = intel_panel_fitting(pipe_config, conn_state); > - if (ret) > - return ret; > + if (!pipe_config->joiner_pipes) { > + ret = intel_panel_fitting(pipe_config, conn_state); > + if (ret) > + return ret; > + } else { > + /* Incase of bigjoiner panel_fitting is handled during pipe_config */ This can be just joiner. Regards, Ankit > + pipe_config->pch_pfit.is_required = true; > + } > } > > pipe_config->limited_color_range = > diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c > index dd18136d1c61..0da45c2330d3 100644 > --- a/drivers/gpu/drm/i915/display/intel_panel.c > +++ b/drivers/gpu/drm/i915/display/intel_panel.c > @@ -395,6 +395,9 @@ static int pch_panel_fitting(struct intel_crtc_state *crtc_state, > u16 crtc_hdisplay = adjusted_mode->crtc_hdisplay; > u16 crtc_vdisplay = adjusted_mode->crtc_vdisplay; > > + if (crtc_state->joiner_pipes) > + crtc_hdisplay = adjusted_mode->crtc_hdisplay / 2; > + > /* Native modes don't need fitting */ > if (crtc_hdisplay == pipe_src_w && > crtc_vdisplay == pipe_src_h &&
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 8bbde03f2508..a7194a84b6b8 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -4796,6 +4796,17 @@ intel_modeset_pipe_config(struct intel_atomic_state *state, return ret; } + for_each_new_connector_in_state(&state->base, connector, connector_state, i) { + if (connector_state->crtc != &crtc->base) + continue; + + if (crtc_state->pch_pfit.is_required) { + ret = intel_panel_fitting(crtc_state, connector_state); + if (ret) + return ret; + } + } + /* Dithering seems to not pass-through bits correctly when it should, so * only enable it on 6bpc panels and when its not a compliance * test requesting 6bpc video pattern. diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index a04d52dbf6e1..a4ab26d8fa43 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1258,6 +1258,7 @@ struct intel_crtc_state { struct drm_rect dst; bool enabled; bool force_thru; + bool is_required; } pch_pfit; /* FDI configuration, only valid if has_pch_encoder is set. */ diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 65182bf69b62..4b707d029206 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2953,9 +2953,14 @@ intel_dp_compute_config(struct intel_encoder *encoder, if ((intel_dp_is_edp(intel_dp) && fixed_mode) || pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) { - ret = intel_panel_fitting(pipe_config, conn_state); - if (ret) - return ret; + if (!pipe_config->joiner_pipes) { + ret = intel_panel_fitting(pipe_config, conn_state); + if (ret) + return ret; + } else { + /* Incase of bigjoiner panel_fitting is handled during pipe_config */ + pipe_config->pch_pfit.is_required = true; + } } pipe_config->limited_color_range = diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c index dd18136d1c61..0da45c2330d3 100644 --- a/drivers/gpu/drm/i915/display/intel_panel.c +++ b/drivers/gpu/drm/i915/display/intel_panel.c @@ -395,6 +395,9 @@ static int pch_panel_fitting(struct intel_crtc_state *crtc_state, u16 crtc_hdisplay = adjusted_mode->crtc_hdisplay; u16 crtc_vdisplay = adjusted_mode->crtc_vdisplay; + if (crtc_state->joiner_pipes) + crtc_hdisplay = adjusted_mode->crtc_hdisplay / 2; + /* Native modes don't need fitting */ if (crtc_hdisplay == pipe_src_w && crtc_vdisplay == pipe_src_h &&
In panel fitter/pipe scaler scenario the pch_pfit configuration currently takes place before accounting for pipe_src width for joiner. This causes issue when pch_pfit and joiner get enabled together. Introduce a new boolean flag is_required which can be filled during dp compute_config and later is used to compute panel_fitting in pipe_config. Modify pch_panel_fitting to handle joiner pipes by adjusting crtc_hdisplay accordingly. Signed-off-by: Nemesa Garg <nemesa.garg@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 11 +++++++++++ drivers/gpu/drm/i915/display/intel_display_types.h | 1 + drivers/gpu/drm/i915/display/intel_dp.c | 11 ++++++++--- drivers/gpu/drm/i915/display/intel_panel.c | 3 +++ 4 files changed, 23 insertions(+), 3 deletions(-)