| Message ID | 20240910143619.143514-1-nemesa.garg@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/display: Workaround for odd panning for planar yuv | expand |
Hi Nemesa,
kernel test robot noticed the following build warnings:
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Nemesa-Garg/drm-i915-display-Workaround-for-odd-panning-for-planar-yuv/20240910-223820
base: git://anongit.freedesktop.org/drm-intel for-linux-next
patch link: https://lore.kernel.org/r/20240910143619.143514-1-nemesa.garg%40intel.com
patch subject: [PATCH] drm/i915/display: Workaround for odd panning for planar yuv
config: x86_64-randconfig-161-20240915 (https://download.01.org/0day-ci/archive/20240915/202409151558.ETIW5UMU-lkp@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
| Closes: https://lore.kernel.org/r/202409151558.ETIW5UMU-lkp@intel.com/
New smatch warnings:
drivers/gpu/drm/i915/display/intel_atomic_plane.c:1045 intel_plane_check_src_coordinates() error: uninitialized symbol 'hsub'.
vim +/hsub +1045 drivers/gpu/drm/i915/display/intel_atomic_plane.c
0ec2a5b291af32 Ville Syrjälä 2023-03-14 991 int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state)
0ec2a5b291af32 Ville Syrjälä 2023-03-14 992 {
0ec2a5b291af32 Ville Syrjälä 2023-03-14 993 struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
0ec2a5b291af32 Ville Syrjälä 2023-03-14 994 const struct drm_framebuffer *fb = plane_state->hw.fb;
0ec2a5b291af32 Ville Syrjälä 2023-03-14 995 struct drm_rect *src = &plane_state->uapi.src;
0ec2a5b291af32 Ville Syrjälä 2023-03-14 996 u32 src_x, src_y, src_w, src_h, hsub, vsub;
0ec2a5b291af32 Ville Syrjälä 2023-03-14 997 bool rotated = drm_rotation_90_or_270(plane_state->hw.rotation);
0ec2a5b291af32 Ville Syrjälä 2023-03-14 998
0ec2a5b291af32 Ville Syrjälä 2023-03-14 999 /*
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1000 * FIXME hsub/vsub vs. block size is a mess. Pre-tgl CCS
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1001 * abuses hsub/vsub so we can't use them here. But as they
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1002 * are limited to 32bpp RGB formats we don't actually need
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1003 * to check anything.
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1004 */
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1005 if (fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1006 fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS)
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1007 return 0;
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1008
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1009 /*
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1010 * Hardware doesn't handle subpixel coordinates.
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1011 * Adjust to (macro)pixel boundary, but be careful not to
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1012 * increase the source viewport size, because that could
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1013 * push the downscaling factor out of bounds.
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1014 */
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1015 src_x = src->x1 >> 16;
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1016 src_w = drm_rect_width(src) >> 16;
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1017 src_y = src->y1 >> 16;
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1018 src_h = drm_rect_height(src) >> 16;
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1019
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1020 drm_rect_init(src, src_x << 16, src_y << 16,
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1021 src_w << 16, src_h << 16);
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1022
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1023 if (fb->format->format == DRM_FORMAT_RGB565 && rotated) {
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1024 hsub = 2;
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1025 vsub = 2;
533a7836d39f1a Juha-Pekka Heikkilä 2023-09-19 1026 } else if (DISPLAY_VER(i915) >= 20 &&
533a7836d39f1a Juha-Pekka Heikkilä 2023-09-19 1027 intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier)) {
533a7836d39f1a Juha-Pekka Heikkilä 2023-09-19 1028 /*
533a7836d39f1a Juha-Pekka Heikkilä 2023-09-19 1029 * This allows NV12 and P0xx formats to have odd size and/or odd
533a7836d39f1a Juha-Pekka Heikkilä 2023-09-19 1030 * source coordinates on DISPLAY_VER(i915) >= 20
533a7836d39f1a Juha-Pekka Heikkilä 2023-09-19 1031 */
533a7836d39f1a Juha-Pekka Heikkilä 2023-09-19 1032 vsub = 1;
68f459ad919373 Nemesa Garg 2024-09-10 1033 /*
68f459ad919373 Nemesa Garg 2024-09-10 1034 * Wa_16023981245 for display version 20.
68f459ad919373 Nemesa Garg 2024-09-10 1035 * Do not support odd x-panning for NV12.
68f459ad919373 Nemesa Garg 2024-09-10 1036 */
68f459ad919373 Nemesa Garg 2024-09-10 1037 if (IS_LUNARLAKE(i915) && fb->format->format != DRM_FORMAT_NV12)
68f459ad919373 Nemesa Garg 2024-09-10 1038 hsub = 1;
husb needs to be initialized on the else path.
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1039 } else {
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1040 hsub = fb->format->hsub;
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1041 vsub = fb->format->vsub;
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1042 }
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1043
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1044 if (rotated)
0ec2a5b291af32 Ville Syrjälä 2023-03-14 @1045 hsub = vsub = max(hsub, vsub);
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1046
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1047 if (src_x % hsub || src_w % hsub) {
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1048 drm_dbg_kms(&i915->drm, "src x/w (%u, %u) must be a multiple of %u (rotated: %s)\n",
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1049 src_x, src_w, hsub, str_yes_no(rotated));
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1050 return -EINVAL;
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1051 }
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1052
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1053 if (src_y % vsub || src_h % vsub) {
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1054 drm_dbg_kms(&i915->drm, "src y/h (%u, %u) must be a multiple of %u (rotated: %s)\n",
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1055 src_y, src_h, vsub, str_yes_no(rotated));
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1056 return -EINVAL;
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1057 }
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1058
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1059 return 0;
0ec2a5b291af32 Ville Syrjälä 2023-03-14 1060 }
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c index e979786aa5cf..4afe808f128c 100644 --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c @@ -1029,8 +1029,13 @@ int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state) * This allows NV12 and P0xx formats to have odd size and/or odd * source coordinates on DISPLAY_VER(i915) >= 20 */ - hsub = 1; vsub = 1; + /* + * Wa_16023981245 for display version 20. + * Do not support odd x-panning for NV12. + */ + if (IS_LUNARLAKE(i915) && fb->format->format != DRM_FORMAT_NV12) + hsub = 1; } else { hsub = fb->format->hsub; vsub = fb->format->vsub;
Disable the support for odd x pan for NV12 format as underrun issue is seen. WA: 16024459452 v2: Replace HSD with WA in commit message [Suraj] Modified the condition for handling odd panning v3: Simplified the condition for checking hsub Using older framework for wa as rev1[Jani] Signed-off-by: Nemesa Garg <nemesa.garg@intel.com> --- drivers/gpu/drm/i915/display/intel_atomic_plane.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)