| Message ID | 20241015231124.23982-8-matthew.s.atwood@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add xe3lpd edp enabling | expand |
> -----Original Message----- > From: Intel-xe <intel-xe-bounces@lists.freedesktop.org> On Behalf Of Matt > Atwood > Sent: Wednesday, 16 October 2024 2.11 > To: intel-xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org > Cc: Kandpal, Suraj <suraj.kandpal@intel.com>; Atwood, Matthew S > <matthew.s.atwood@intel.com> > Subject: [PATCH v3 7/7] drm/i915/xe3lpd: Add condition for EDP to powerdown > P2.PG > > From: Suraj Kandpal <suraj.kandpal@intel.com> > > Add condition for P2.PG power down value. > > v2: change subject line to better match patch condition > > Bspec: 74494 Reviewed-by: Mika Kahola <mika.kahola@intel.com> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> > Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com> > --- > drivers/gpu/drm/i915/display/intel_cx0_phy.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c > b/drivers/gpu/drm/i915/display/intel_cx0_phy.c > index 37c66b32325d..13a99f494680 100644 > --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c > +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c > @@ -3146,7 +3146,8 @@ static u8 cx0_power_control_disable_val(struct > intel_encoder *encoder) > if (intel_encoder_is_c10phy(encoder)) > return CX0_P2PG_STATE_DISABLE; > > - if (IS_BATTLEMAGE(i915) && encoder->port == PORT_A) > + if ((IS_BATTLEMAGE(i915) && encoder->port == PORT_A) || > + (DISPLAY_VER(i915) >= 30 && encoder->type == > INTEL_OUTPUT_EDP)) > return CX0_P2PG_STATE_DISABLE; > > return CX0_P4PG_STATE_DISABLE; > -- > 2.45.0
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c index 37c66b32325d..13a99f494680 100644 --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c @@ -3146,7 +3146,8 @@ static u8 cx0_power_control_disable_val(struct intel_encoder *encoder) if (intel_encoder_is_c10phy(encoder)) return CX0_P2PG_STATE_DISABLE; - if (IS_BATTLEMAGE(i915) && encoder->port == PORT_A) + if ((IS_BATTLEMAGE(i915) && encoder->port == PORT_A) || + (DISPLAY_VER(i915) >= 30 && encoder->type == INTEL_OUTPUT_EDP)) return CX0_P2PG_STATE_DISABLE; return CX0_P4PG_STATE_DISABLE;