diff mbox series

[11/16] drm/i915/dp: Account for pixel replication for BW computation with DSC

Message ID 20241021123414.3993899-12-ankit.k.nautiyal@intel.com (mailing list archive)
State New, archived
Headers show
Series Add support for 3 VDSC engines 12 slices | expand

Commit Message

Nautiyal, Ankit K Oct. 21, 2024, 12:34 p.m. UTC 
Include the extra pixels added while computing bandwidth with DSC.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 23 ++++++++++++++++++++++-
 1 file changed, 22 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 53a437caacac..f35d6fc376c8 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1940,6 +1940,23 @@  static bool is_bw_sufficient_for_dsc_config(u16 compressed_bppx16, u32 link_cloc
 	return available_bw > required_bw;
 }
 
+static
+u32 adjust_clock_for_extra_pixels(const struct drm_display_mode *adjusted_mode,
+				  int extra_pixels)
+{
+	u32 clock = adjusted_mode->clock;
+	u16 htotal = adjusted_mode->htotal;
+
+	if (!extra_pixels)
+		return clock;
+	/*
+	 * clock = (htotal) * (vtotal) * refresh_rate
+	 * adjusted_clock = (htotal + extra_pixels) * (vtotal) * refresh_rate
+	 * = clock + (clock * extra_pixels / htotal)
+	 */
+	return clock + extra_pixels * (clock / htotal);
+}
+
 static int dsc_compute_link_config(struct intel_dp *intel_dp,
 				   struct intel_crtc_state *pipe_config,
 				   struct link_config_limits *limits,
@@ -1948,8 +1965,12 @@  static int dsc_compute_link_config(struct intel_dp *intel_dp,
 {
 	const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
 	int link_rate, lane_count;
+	u32 adjusted_clock;
 	int i;
 
+	adjusted_clock = adjust_clock_for_extra_pixels(adjusted_mode,
+						       pipe_config->dsc.replicated_pixels);
+
 	for (i = 0; i < intel_dp->num_common_rates; i++) {
 		link_rate = intel_dp_common_rate(intel_dp, i);
 		if (link_rate < limits->min_rate || link_rate > limits->max_rate)
@@ -1959,7 +1980,7 @@  static int dsc_compute_link_config(struct intel_dp *intel_dp,
 		     lane_count <= limits->max_lane_count;
 		     lane_count <<= 1) {
 			if (!is_bw_sufficient_for_dsc_config(compressed_bppx16, link_rate,
-							     lane_count, adjusted_mode->clock,
+							     lane_count, adjusted_clock,
 							     pipe_config->output_format,
 							     timeslots))
 				continue;