diff mbox series

[15/16] drm/i915/display: Adjust Pipe SRC Width for Odd Pixels

Message ID 20241023065257.190035-16-ankit.k.nautiyal@intel.com (mailing list archive)
State New
Headers show
Series Add support for 3 VDSC engines 12 slices | expand

Commit Message

Nautiyal, Ankit K Oct. 23, 2024, 6:52 a.m. UTC
Enhance the `intel_splitter_adjust_pipe_width` helper to account for
both pixel replication and odd pixels. When the display width is
divided among multiple pipes, extra pixels can make the pipe source
width odd. Since hardware expects an even width, an extra pixel is
added to each pipe to ensure even width.

The splitter hardware will remove these extra pixels.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 22 +++++++++++++++-----
 1 file changed, 17 insertions(+), 5 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index bab1ab1236df..67dfada13eab 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2514,12 +2514,18 @@  void intel_encoder_get_config(struct intel_encoder *encoder,
 	intel_crtc_readout_derived_state(crtc_state);
 }
 
-static int intel_splitter_adjust_pipe_width(int width, int replicated_pixels)
+static int intel_splitter_adjust_pipe_width(int width, int replicated_pixels,
+					    bool has_odd_pixel, int num_pipes)
 {
-	/* Account for Pixel replication:
+	/* Account for Pixel replication + Odd pixel:
 	 * Pixel replication is required due to the rounding of slice_width (Hactive / slice_count).
 	 *
-	 * Splitter HW takes care of these by removing replicated pixels from the last pipe.
+	 * These extra pixels when added to the pipe source width, can make the pipe source width
+	 * odd. Since HW expects the pipe source width to be even, therefore one extra pixel needs
+	 * to be added to the pipe source width to make it even.
+	 *
+	 * Splitter HW takes care of these by removing odd pixel from each pipe and
+	 * replicated pixels from the last pipe.
 	 */
 
 	if (!replicated_pixels)
@@ -2527,7 +2533,11 @@  static int intel_splitter_adjust_pipe_width(int width, int replicated_pixels)
 
 	width += replicated_pixels;
 
-	return width;
+	if (!has_odd_pixel)
+		return width;
+
+	/* Account for one extra pixel for each pipe */
+	return width + num_pipes;
 }
 
 static void intel_joiner_compute_pipe_src(struct intel_crtc_state *crtc_state)
@@ -2539,7 +2549,9 @@  static void intel_joiner_compute_pipe_src(struct intel_crtc_state *crtc_state)
 		return;
 
 	width = intel_splitter_adjust_pipe_width(drm_rect_width(&crtc_state->pipe_src),
-						 crtc_state->dsc.replicated_pixels);
+						 crtc_state->dsc.replicated_pixels,
+						 crtc_state->dsc.has_odd_pixel,
+						 num_pipes);
 
 	height = drm_rect_height(&crtc_state->pipe_src);