diff mbox series

[2/3] drm/i915/psr: Change psr size limits check

Message ID 20241028074333.182041-3-suraj.kandpal@intel.com (mailing list archive)
State New, archived
Headers show
Series Add 6k resolution support for a single CRTC | expand

Commit Message

Suraj Kandpal Oct. 28, 2024, 7:43 a.m. UTC
Change the check to only check for psr size limits till Pre-Xe2
since after that the psr size is equal to maximum pipe size anyways.

--v2
-Check only size limit until pre-Xe2 [Matt]

Bspec: 69885, 68858
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Nautiyal, Ankit K Oct. 28, 2024, 12:44 p.m. UTC | #1
On 10/28/2024 1:13 PM, Suraj Kandpal wrote:
> Change the check to only check for psr size limits till Pre-Xe2
> since after that the psr size is equal to maximum pipe size anyways.
>
> --v2
> -Check only size limit until pre-Xe2 [Matt]
>
> Bspec: 69885, 68858
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>

LGTM.

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>

> ---
>   drivers/gpu/drm/i915/display/intel_psr.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 4176163ec19a..7bc64eae9c8e 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1453,11 +1453,11 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
>   		return false;
>   	}
>   
> -	if (DISPLAY_VER(display) >= 12) {
> +	if (IS_DISPLAY_VER(display, 12, 14)) {
>   		psr_max_h = 5120;
>   		psr_max_v = 3200;
>   		max_bpp = 30;
> -	} else if (DISPLAY_VER(display) >= 10) {
> +	} else if (IS_DISPLAY_VER(display, 10, 11)) {
>   		psr_max_h = 4096;
>   		psr_max_v = 2304;
>   		max_bpp = 24;
Nautiyal, Ankit K Oct. 28, 2024, 12:54 p.m. UTC | #2
On 10/28/2024 6:14 PM, Nautiyal, Ankit K wrote:
>
> On 10/28/2024 1:13 PM, Suraj Kandpal wrote:
>> Change the check to only check for psr size limits till Pre-Xe2
>> since after that the psr size is equal to maximum pipe size anyways.
>>
>> --v2
>> -Check only size limit until pre-Xe2 [Matt]
>>
>> Bspec: 69885, 68858
>> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
>
> LGTM.
>
> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>
>> ---
>>   drivers/gpu/drm/i915/display/intel_psr.c | 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
>> b/drivers/gpu/drm/i915/display/intel_psr.c
>> index 4176163ec19a..7bc64eae9c8e 100644
>> --- a/drivers/gpu/drm/i915/display/intel_psr.c
>> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
>> @@ -1453,11 +1453,11 @@ static bool intel_psr2_config_valid(struct 
>> intel_dp *intel_dp,
>>           return false;
>>       }
>>   -    if (DISPLAY_VER(display) >= 12) {

I think you missed to initialize psr_max_{h,v} and max_bpp with 
crtc_{h,v}display and crtc_state->pipe_bpp respectively.

Otherwise those are all 0's and will fail for Display ver > 14.


Regards,

Ankit

>> +    if (IS_DISPLAY_VER(display, 12, 14)) {
>>           psr_max_h = 5120;
>>           psr_max_v = 3200;
>>           max_bpp = 30;
>> -    } else if (DISPLAY_VER(display) >= 10) {
>> +    } else if (IS_DISPLAY_VER(display, 10, 11)) {
>>           psr_max_h = 4096;
>>           psr_max_v = 2304;
>>           max_bpp = 24;
Matt Roper Oct. 28, 2024, 9:11 p.m. UTC | #3
On Mon, Oct 28, 2024 at 01:13:32PM +0530, Suraj Kandpal wrote:
> Change the check to only check for psr size limits till Pre-Xe2
> since after that the psr size is equal to maximum pipe size anyways.
> 
> --v2
> -Check only size limit until pre-Xe2 [Matt]

This will skip setting the limits (leaving them as 0), but I think the
important thing is actually to avoid the check against these values
farther down:

   if (!crtc_state->enable_psr2_sel_fetch &&                                                              
       (crtc_hdisplay > psr_max_h || crtc_vdisplay > psr_max_v)) {

You can add another condition to that to make it only apply to pre-Xe2,
or you could probably change the assignments here to something like

        if (DISPLAY_VER(display) >= 20) {
                /* There are no PSR-specific resolution limits */
                psr_max_h = INT_MAX;
                psr_max_v = INT_MAX;
                max_bpp = 30;
        } else if (DISPLAY_VER(display) >= 12) {
                ...

which will make the condition always pass on these platforms.


Matt

> 
> Bspec: 69885, 68858
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 4176163ec19a..7bc64eae9c8e 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1453,11 +1453,11 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
>  		return false;
>  	}
>  
> -	if (DISPLAY_VER(display) >= 12) {
> +	if (IS_DISPLAY_VER(display, 12, 14)) {
>  		psr_max_h = 5120;
>  		psr_max_v = 3200;
>  		max_bpp = 30;
> -	} else if (DISPLAY_VER(display) >= 10) {
> +	} else if (IS_DISPLAY_VER(display, 10, 11)) {
>  		psr_max_h = 4096;
>  		psr_max_v = 2304;
>  		max_bpp = 24;
> -- 
> 2.34.1
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 4176163ec19a..7bc64eae9c8e 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1453,11 +1453,11 @@  static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 		return false;
 	}
 
-	if (DISPLAY_VER(display) >= 12) {
+	if (IS_DISPLAY_VER(display, 12, 14)) {
 		psr_max_h = 5120;
 		psr_max_v = 3200;
 		max_bpp = 30;
-	} else if (DISPLAY_VER(display) >= 10) {
+	} else if (IS_DISPLAY_VER(display, 10, 11)) {
 		psr_max_h = 4096;
 		psr_max_v = 2304;
 		max_bpp = 24;