Message ID | 20241031-drm-dp-msm-add-lttpr-transparent-mode-set-v1-1-cafbb9855f40@linaro.org (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | drm/dp: Rework LTTPR transparent mode handling and add support to msm driver | expand |
On Fri, Nov 01, 2024 at 11:22:13AM +0200, Jani Nikula wrote: > On Thu, 31 Oct 2024, Imre Deak <imre.deak@intel.com> wrote: > > On Thu, Oct 31, 2024 at 05:12:45PM +0200, Abel Vesa wrote: > >> According to the DisplayPort standard, LTTPRs have two operating > >> modes: > >> - non-transparent - it replies to DPCD LTTPR field specific AUX > >> requests, while passes through all other AUX requests > >> - transparent - it passes through all AUX requests. > >> > >> Switching between this two modes is done by the DPTX by issuing > >> an AUX write to the DPCD PHY_REPEATER_MODE register. > >> > >> Add a generic helper that allows switching between these modes. > >> > >> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > >> --- > >> drivers/gpu/drm/display/drm_dp_helper.c | 17 +++++++++++++++++ > >> include/drm/display/drm_dp_helper.h | 1 + > >> 2 files changed, 18 insertions(+) > >> > >> diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c > >> index 6ee51003de3ce616c3a52653c2f1979ad7658e21..38d612345986ad54b42228902ea718a089d169c4 100644 > >> --- a/drivers/gpu/drm/display/drm_dp_helper.c > >> +++ b/drivers/gpu/drm/display/drm_dp_helper.c > >> @@ -2694,6 +2694,23 @@ int drm_dp_lttpr_max_link_rate(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]) > >> } > >> EXPORT_SYMBOL(drm_dp_lttpr_max_link_rate); > >> > >> +/** > >> + * drm_dp_lttpr_set_transparent_mode - set the LTTPR in transparent mode > >> + * @aux: DisplayPort AUX channel > >> + * @enable: Enable or disable transparent mode > >> + * > >> + * Returns 0 on success or a negative error code on failure. > > > > Should be "Returns 1 on success". > > But is that a sensible return value? It matches what the function returns, but yes, would make more sense to fix the return value instead to be 0 in case of success. > > > >> + */ > >> + > > Superfluous newline. > > >> +int drm_dp_lttpr_set_transparent_mode(struct drm_dp_aux *aux, bool enable) > >> +{ > >> + u8 val = enable ? DP_PHY_REPEATER_MODE_TRANSPARENT : > >> + DP_PHY_REPEATER_MODE_NON_TRANSPARENT; > >> + > >> + return drm_dp_dpcd_writeb(aux, DP_PHY_REPEATER_MODE, val); > >> +} > >> +EXPORT_SYMBOL(drm_dp_lttpr_set_transparent_mode); > >> + > >> /** > >> * drm_dp_lttpr_max_lane_count - get the maximum lane count supported by all LTTPRs > >> * @caps: LTTPR common capabilities > >> diff --git a/include/drm/display/drm_dp_helper.h b/include/drm/display/drm_dp_helper.h > >> index 279624833ea9259809428162f4e845654359f8c9..8821ab2d36b0e04d38ccbdddcb703b34de7ed680 100644 > >> --- a/include/drm/display/drm_dp_helper.h > >> +++ b/include/drm/display/drm_dp_helper.h > >> @@ -625,6 +625,7 @@ int drm_dp_read_lttpr_phy_caps(struct drm_dp_aux *aux, > >> u8 caps[DP_LTTPR_PHY_CAP_SIZE]); > >> int drm_dp_lttpr_count(const u8 cap[DP_LTTPR_COMMON_CAP_SIZE]); > >> int drm_dp_lttpr_max_link_rate(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]); > >> +int drm_dp_lttpr_set_transparent_mode(struct drm_dp_aux *aux, bool enable); > >> int drm_dp_lttpr_max_lane_count(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]); > >> bool drm_dp_lttpr_voltage_swing_level_3_supported(const u8 caps[DP_LTTPR_PHY_CAP_SIZE]); > >> bool drm_dp_lttpr_pre_emphasis_level_3_supported(const u8 caps[DP_LTTPR_PHY_CAP_SIZE]); > >> > >> -- > >> 2.34.1 > >> > > -- > Jani Nikula, Intel
On Fri, Nov 01, 2024 at 03:43:40PM +0200, Imre Deak wrote: > On Fri, Nov 01, 2024 at 11:22:13AM +0200, Jani Nikula wrote: > > On Thu, 31 Oct 2024, Imre Deak <imre.deak@intel.com> wrote: > > > On Thu, Oct 31, 2024 at 05:12:45PM +0200, Abel Vesa wrote: > > >> According to the DisplayPort standard, LTTPRs have two operating > > >> modes: > > >> - non-transparent - it replies to DPCD LTTPR field specific AUX > > >> requests, while passes through all other AUX requests > > >> - transparent - it passes through all AUX requests. > > >> > > >> Switching between this two modes is done by the DPTX by issuing > > >> an AUX write to the DPCD PHY_REPEATER_MODE register. > > >> > > >> Add a generic helper that allows switching between these modes. > > >> > > >> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > > >> --- > > >> drivers/gpu/drm/display/drm_dp_helper.c | 17 +++++++++++++++++ > > >> include/drm/display/drm_dp_helper.h | 1 + > > >> 2 files changed, 18 insertions(+) > > >> > > >> diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c > > >> index 6ee51003de3ce616c3a52653c2f1979ad7658e21..38d612345986ad54b42228902ea718a089d169c4 100644 > > >> --- a/drivers/gpu/drm/display/drm_dp_helper.c > > >> +++ b/drivers/gpu/drm/display/drm_dp_helper.c > > >> @@ -2694,6 +2694,23 @@ int drm_dp_lttpr_max_link_rate(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]) > > >> } > > >> EXPORT_SYMBOL(drm_dp_lttpr_max_link_rate); > > >> > > >> +/** > > >> + * drm_dp_lttpr_set_transparent_mode - set the LTTPR in transparent mode > > >> + * @aux: DisplayPort AUX channel > > >> + * @enable: Enable or disable transparent mode > > >> + * > > >> + * Returns 0 on success or a negative error code on failure. > > > > > > Should be "Returns 1 on success". > > > > But is that a sensible return value? > > It matches what the function returns, but yes, would make more sense to > fix the return value instead to be 0 in case of success. I think returning 0 is better in case of this function. > > > > > > >> + */ > > >> + > > > > Superfluous newline. > > > > >> +int drm_dp_lttpr_set_transparent_mode(struct drm_dp_aux *aux, bool enable) > > >> +{ > > >> + u8 val = enable ? DP_PHY_REPEATER_MODE_TRANSPARENT : > > >> + DP_PHY_REPEATER_MODE_NON_TRANSPARENT; > > >> + > > >> + return drm_dp_dpcd_writeb(aux, DP_PHY_REPEATER_MODE, val); > > >> +} > > >> +EXPORT_SYMBOL(drm_dp_lttpr_set_transparent_mode); > > >> + > > >> /** > > >> * drm_dp_lttpr_max_lane_count - get the maximum lane count supported by all LTTPRs > > >> * @caps: LTTPR common capabilities > > >> diff --git a/include/drm/display/drm_dp_helper.h b/include/drm/display/drm_dp_helper.h > > >> index 279624833ea9259809428162f4e845654359f8c9..8821ab2d36b0e04d38ccbdddcb703b34de7ed680 100644 > > >> --- a/include/drm/display/drm_dp_helper.h > > >> +++ b/include/drm/display/drm_dp_helper.h > > >> @@ -625,6 +625,7 @@ int drm_dp_read_lttpr_phy_caps(struct drm_dp_aux *aux, > > >> u8 caps[DP_LTTPR_PHY_CAP_SIZE]); > > >> int drm_dp_lttpr_count(const u8 cap[DP_LTTPR_COMMON_CAP_SIZE]); > > >> int drm_dp_lttpr_max_link_rate(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]); > > >> +int drm_dp_lttpr_set_transparent_mode(struct drm_dp_aux *aux, bool enable); > > >> int drm_dp_lttpr_max_lane_count(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]); > > >> bool drm_dp_lttpr_voltage_swing_level_3_supported(const u8 caps[DP_LTTPR_PHY_CAP_SIZE]); > > >> bool drm_dp_lttpr_pre_emphasis_level_3_supported(const u8 caps[DP_LTTPR_PHY_CAP_SIZE]); > > >> > > >> -- > > >> 2.34.1 > > >> > > > > -- > > Jani Nikula, Intel
diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c index 6ee51003de3ce616c3a52653c2f1979ad7658e21..38d612345986ad54b42228902ea718a089d169c4 100644 --- a/drivers/gpu/drm/display/drm_dp_helper.c +++ b/drivers/gpu/drm/display/drm_dp_helper.c @@ -2694,6 +2694,23 @@ int drm_dp_lttpr_max_link_rate(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]) } EXPORT_SYMBOL(drm_dp_lttpr_max_link_rate); +/** + * drm_dp_lttpr_set_transparent_mode - set the LTTPR in transparent mode + * @aux: DisplayPort AUX channel + * @enable: Enable or disable transparent mode + * + * Returns 0 on success or a negative error code on failure. + */ + +int drm_dp_lttpr_set_transparent_mode(struct drm_dp_aux *aux, bool enable) +{ + u8 val = enable ? DP_PHY_REPEATER_MODE_TRANSPARENT : + DP_PHY_REPEATER_MODE_NON_TRANSPARENT; + + return drm_dp_dpcd_writeb(aux, DP_PHY_REPEATER_MODE, val); +} +EXPORT_SYMBOL(drm_dp_lttpr_set_transparent_mode); + /** * drm_dp_lttpr_max_lane_count - get the maximum lane count supported by all LTTPRs * @caps: LTTPR common capabilities diff --git a/include/drm/display/drm_dp_helper.h b/include/drm/display/drm_dp_helper.h index 279624833ea9259809428162f4e845654359f8c9..8821ab2d36b0e04d38ccbdddcb703b34de7ed680 100644 --- a/include/drm/display/drm_dp_helper.h +++ b/include/drm/display/drm_dp_helper.h @@ -625,6 +625,7 @@ int drm_dp_read_lttpr_phy_caps(struct drm_dp_aux *aux, u8 caps[DP_LTTPR_PHY_CAP_SIZE]); int drm_dp_lttpr_count(const u8 cap[DP_LTTPR_COMMON_CAP_SIZE]); int drm_dp_lttpr_max_link_rate(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]); +int drm_dp_lttpr_set_transparent_mode(struct drm_dp_aux *aux, bool enable); int drm_dp_lttpr_max_lane_count(const u8 caps[DP_LTTPR_COMMON_CAP_SIZE]); bool drm_dp_lttpr_voltage_swing_level_3_supported(const u8 caps[DP_LTTPR_PHY_CAP_SIZE]); bool drm_dp_lttpr_pre_emphasis_level_3_supported(const u8 caps[DP_LTTPR_PHY_CAP_SIZE]);
According to the DisplayPort standard, LTTPRs have two operating modes: - non-transparent - it replies to DPCD LTTPR field specific AUX requests, while passes through all other AUX requests - transparent - it passes through all AUX requests. Switching between this two modes is done by the DPTX by issuing an AUX write to the DPCD PHY_REPEATER_MODE register. Add a generic helper that allows switching between these modes. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> --- drivers/gpu/drm/display/drm_dp_helper.c | 17 +++++++++++++++++ include/drm/display/drm_dp_helper.h | 1 + 2 files changed, 18 insertions(+)