| Message ID | 20250207223159.14132-4-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | drm/i915/vrr: Fix DSB+VRR usage for PTL+ | expand |
On 2/8/2025 4:01 AM, Ville Syrjala wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > When we send a push during vblank the TRANS_PUSH write happens > at some point during a scanline, and the hardware picks it up > on the next scanline. Thus there is up to one extra scanline > of delay between the TRANS_PUSH write and the delayed vblank > triggering. Account for that during intel_dsb_wait_vblank_delay() > so that we are guaranteed to be past the delayed vblank before > we trigger the completion interrupt for the commit. > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> > --- > drivers/gpu/drm/i915/display/intel_dsb.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c > index f8bd6fad0c87..01e3bd385cac 100644 > --- a/drivers/gpu/drm/i915/display/intel_dsb.c > +++ b/drivers/gpu/drm/i915/display/intel_dsb.c > @@ -116,7 +116,13 @@ static int dsb_vblank_delay(struct intel_atomic_state *state, > intel_pre_commit_crtc_state(state, crtc); > > if (pre_commit_is_vrr_active(state, crtc)) > - return intel_vrr_vblank_delay(crtc_state); > + /* > + * When the push is sent during vblank it will trigger > + * on the next scanline, hence we have up to one extra > + * scanline until the delayed vblank occurs after > + * TRANS_PUSH has been written. > + */ > + return intel_vrr_vblank_delay(crtc_state) + 1; > else > return intel_mode_vblank_delay(&crtc_state->hw.adjusted_mode); > }
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c index f8bd6fad0c87..01e3bd385cac 100644 --- a/drivers/gpu/drm/i915/display/intel_dsb.c +++ b/drivers/gpu/drm/i915/display/intel_dsb.c @@ -116,7 +116,13 @@ static int dsb_vblank_delay(struct intel_atomic_state *state, intel_pre_commit_crtc_state(state, crtc); if (pre_commit_is_vrr_active(state, crtc)) - return intel_vrr_vblank_delay(crtc_state); + /* + * When the push is sent during vblank it will trigger + * on the next scanline, hence we have up to one extra + * scanline until the delayed vblank occurs after + * TRANS_PUSH has been written. + */ + return intel_vrr_vblank_delay(crtc_state) + 1; else return intel_mode_vblank_delay(&crtc_state->hw.adjusted_mode); }