| Message ID | 20250224061717.1095226-12-ankit.k.nautiyal@intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Use VRR timing generator for fixed refresh rate modes | expand |
On Mon, Feb 24, 2025 at 11:47:08AM +0530, Ankit Nautiyal wrote: > As per bspec 49268: Disable PSR before disabling VRR. We don't currently allow the VRR+PSR combo anyway, but if/when we get to it I guess we'll want this order. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Hmm, the intel_psr_post_plane_update() should probably also be moved to the end of intel_post_plane_update((). Not becasue of VRR (that was already enabled in the commit proper) but because some of the other stuff in intel_post_plane_update() may need to do vblank waits and whatnot, so enabling PSR as early as we do now is simply counter productive. > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index 065fdf6dbb88..0db84af1063a 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -1202,6 +1202,8 @@ static void intel_pre_plane_update(struct intel_atomic_state *state, > intel_atomic_get_new_crtc_state(state, crtc); > enum pipe pipe = crtc->pipe; > > + intel_psr_pre_plane_update(state, crtc); > + > if (intel_crtc_vrr_disabling(state, crtc)) { > intel_vrr_disable(old_crtc_state); > intel_crtc_update_active_timings(old_crtc_state, false); > @@ -1212,8 +1214,6 @@ static void intel_pre_plane_update(struct intel_atomic_state *state, > > intel_drrs_deactivate(old_crtc_state); > > - intel_psr_pre_plane_update(state, crtc); > - > if (hsw_ips_pre_update(state, crtc)) > intel_crtc_wait_for_next_vblank(crtc); > > -- > 2.45.2
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 065fdf6dbb88..0db84af1063a 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1202,6 +1202,8 @@ static void intel_pre_plane_update(struct intel_atomic_state *state, intel_atomic_get_new_crtc_state(state, crtc); enum pipe pipe = crtc->pipe; + intel_psr_pre_plane_update(state, crtc); + if (intel_crtc_vrr_disabling(state, crtc)) { intel_vrr_disable(old_crtc_state); intel_crtc_update_active_timings(old_crtc_state, false); @@ -1212,8 +1214,6 @@ static void intel_pre_plane_update(struct intel_atomic_state *state, intel_drrs_deactivate(old_crtc_state); - intel_psr_pre_plane_update(state, crtc); - if (hsw_ips_pre_update(state, crtc)) intel_crtc_wait_for_next_vblank(crtc);
As per bspec 49268: Disable PSR before disabling VRR. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)