| Message ID | 20250224061717.1095226-13-ankit.k.nautiyal@intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Use VRR timing generator for fixed refresh rate modes | expand |
On Mon, Feb 24, 2025 at 11:47:09AM +0530, Ankit Nautiyal wrote: > Wa_14015406119 is required for PSR1/2 while working with fixed refresh > rate with VRR timing generator. > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index 0db84af1063a..752ed44d8892 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -2508,8 +2508,9 @@ static bool intel_crtc_needs_wa_14015401596(const struct intel_crtc_state *crtc_ > { > struct intel_display *display = to_intel_display(crtc_state); > > - return intel_vrr_possible(crtc_state) && crtc_state->has_psr && > - IS_DISPLAY_VER(display, 13, 14); > + return intel_vrr_possible(crtc_state) && > + (crtc_state->has_psr || crtc_state->has_sel_update) && I presume you wanted some kind of use_vrr_tg_always() check here instead of that has_sel_update thing (which is a nop since it should never be set unless has_psr is also set)? > + IS_DISPLAY_VER(display, 13, 14); > } > > static int intel_crtc_vblank_delay(const struct intel_crtc_state *crtc_state) > -- > 2.45.2
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 0db84af1063a..752ed44d8892 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -2508,8 +2508,9 @@ static bool intel_crtc_needs_wa_14015401596(const struct intel_crtc_state *crtc_ { struct intel_display *display = to_intel_display(crtc_state); - return intel_vrr_possible(crtc_state) && crtc_state->has_psr && - IS_DISPLAY_VER(display, 13, 14); + return intel_vrr_possible(crtc_state) && + (crtc_state->has_psr || crtc_state->has_sel_update) && + IS_DISPLAY_VER(display, 13, 14); } static int intel_crtc_vblank_delay(const struct intel_crtc_state *crtc_state)
Wa_14015406119 is required for PSR1/2 while working with fixed refresh rate with VRR timing generator. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)