From patchwork Mon Feb 24 06:17:01 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: "Nautiyal, Ankit K" X-Patchwork-Id: 13988130 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F2325C021BD for ; Mon, 24 Feb 2025 13:44:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BC4E710E510; Mon, 24 Feb 2025 13:42:16 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="IFRYuvcB"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id E4B8C10E13C; Mon, 24 Feb 2025 06:29:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1740378578; x=1771914578; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=OR1fNJ/2FSPDfyrpx8uFRA4Gb6MpClNXZ7TRI3F/hJI=; b=IFRYuvcBNioCmc5g7Jawpgtp4tNqBcRTU+E1ixPlc0oaX/iy1AT8QBgZ HXzMqZCGYZUZR6RW4Vp8Md0rh8bkQNR/yW5eRQ0kY6tGBzJ9v60hBlaLq W+85P7Qxd2bukYpCw6cBf1NzL/7kxv7MsfHmqtkGfUkgXGi19QKBxoD+d HqI/uYu0LeyQgkACAoKScnnrF1cHfaIW2uBD5Wc9X0WPat2nbSJrqEdGC z5bUrZJg4zmGYgg5ycICsy8O86iOPkpBmBkbGiz9xpfm9Lp5/VSJ0Fvqe J4w8eCJ0LbRvYXmx5FQ3BkUzgyx0sSNhbQrkfc8obpGcDmv5QqlIbUe5I A==; X-CSE-ConnectionGUID: Nt11tU4WQXmqYr51qs+tFw== X-CSE-MsgGUID: 2sTb9M5gSMWsoWwA5PisNQ== X-IronPort-AV: E=McAfee;i="6700,10204,11354"; a="28719649" X-IronPort-AV: E=Sophos;i="6.13,309,1732608000"; d="scan'208";a="28719649" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Feb 2025 22:29:37 -0800 X-CSE-ConnectionGUID: jyE+K+x6TeCQPiG8M3r72A== X-CSE-MsgGUID: 1CqiRt7jSeyX+EVp68QALw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,224,1728975600"; d="scan'208";a="120076483" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Feb 2025 22:29:37 -0800 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, jani.nikula@linux.intel.com, ville.syrjala@linux.intel.com, mitulkumar.ajitkumar.golani@intel.com Subject: [PATCH 04/20] drm/i915/vrr: Disable CMRR Date: Mon, 24 Feb 2025 11:47:01 +0530 Message-ID: <20250224061717.1095226-5-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250224061717.1095226-1-ankit.k.nautiyal@intel.com> References: <20250224061717.1095226-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Switching between variable and fixed timings is possible as for that we just need to flip between VRR timings. However for CMRR along with the timings, few other bits also need to be changed on the fly, which might cause issues. So disable CMRR for now, till we have variable and fixed timings sorted out. Signed-off-by: Ankit Nautiyal Reviewed-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_vrr.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 008a9c3e152d..0ee7fb0362ce 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -182,7 +182,8 @@ is_cmrr_frac_required(struct intel_crtc_state *crtc_state) int calculated_refresh_k, actual_refresh_k, pixel_clock_per_line; struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; - if (!HAS_CMRR(display)) + /* Avoid CMRR for now till we have VRR with fixed timings working */ + if (!HAS_CMRR(display) || true) return false; actual_refresh_k =