diff mbox series

[06/20] drm/i915/vrr: Use crtc_vtotal for vmin

Message ID 20250224061717.1095226-7-ankit.k.nautiyal@intel.com (mailing list archive)
State New
Headers show
Series Use VRR timing generator for fixed refresh rate modes | expand

Commit Message

Nautiyal, Ankit K Feb. 24, 2025, 6:17 a.m. UTC
To have fixed refresh rate with VRR timing generator the
guardband/pipeline full can't be programmed on the fly. So we need to
ensure that the values satisfy both the fixed and variable refresh
rates.

Since we compute these value based on vmin, lets set the vmin to
crtc_vtotal for both fixed and variable timings instead of using the
current refresh rate based approach. This way the guardband remains
sufficient for both cases.

v2: Avoid using vblank delay while computing vtotal, as this comes into
the picture later. (Ville)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vrr.c | 21 ++++++++++-----------
 1 file changed, 10 insertions(+), 11 deletions(-)

Comments

Ville Syrjälä Feb. 26, 2025, 1:11 p.m. UTC | #1
On Mon, Feb 24, 2025 at 11:47:03AM +0530, Ankit Nautiyal wrote:
> To have fixed refresh rate with VRR timing generator the
> guardband/pipeline full can't be programmed on the fly. So we need to
> ensure that the values satisfy both the fixed and variable refresh
> rates.
> 
> Since we compute these value based on vmin, lets set the vmin to
> crtc_vtotal for both fixed and variable timings instead of using the
> current refresh rate based approach. This way the guardband remains
> sufficient for both cases.
> 
> v2: Avoid using vblank delay while computing vtotal, as this comes into
> the picture later. (Ville)
> 
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_vrr.c | 21 ++++++++++-----------
>  1 file changed, 10 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
> index 4d7f29be55b8..b6120ff1a87c 100644
> --- a/drivers/gpu/drm/i915/display/intel_vrr.c
> +++ b/drivers/gpu/drm/i915/display/intel_vrr.c
> @@ -247,17 +247,16 @@ void intel_vrr_compute_vrr_timings(struct intel_crtc_state *crtc_state)
>  }
>  
>  static
> -int intel_vrr_compute_vmin(struct intel_connector *connector,
> -			   struct drm_display_mode *adjusted_mode)
> +int intel_vrr_compute_vmin(struct intel_crtc_state *crtc_state)
>  {
> -	int vmin;
> -	const struct drm_display_info *info = &connector->base.display_info;
> -
> -	vmin = DIV_ROUND_UP(adjusted_mode->crtc_clock * 1000,
> -			    adjusted_mode->crtc_htotal * info->monitor_range.max_vfreq);
> -	vmin = max_t(int, vmin, adjusted_mode->crtc_vtotal);
> -
> -	return vmin;
> +	/*
> +	 * To make fixed rr and vrr work seamless the guardband/pipeline full
> +	 * should be set such that it satisfies both the fixed and variable
> +	 * timings.
> +	 * For this set the vmin as crtc_vtotal. With this we never need to
> +	 * change anything to do with the guardband.
> +	 */
> +	return crtc_state->hw.adjusted_mode.crtc_vtotal;

This is also more consistent what the DP Spec says IIRC, which is
roughtly along the lines of "the timings of the mode define the max
refresh rate". And we do the intel_vrr_is_in_range() check for these
so we know they are good.


Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

>  }
>  
>  static
> @@ -305,7 +304,7 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
>  	if (HAS_LRR(display))
>  		crtc_state->update_lrr = true;
>  
> -	vmin = intel_vrr_compute_vmin(connector, adjusted_mode);
> +	vmin = intel_vrr_compute_vmin(crtc_state);
>  	vmax = intel_vrr_compute_vmax(connector, adjusted_mode);
>  
>  	if (vmin >= vmax)
> -- 
> 2.45.2
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 4d7f29be55b8..b6120ff1a87c 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -247,17 +247,16 @@  void intel_vrr_compute_vrr_timings(struct intel_crtc_state *crtc_state)
 }
 
 static
-int intel_vrr_compute_vmin(struct intel_connector *connector,
-			   struct drm_display_mode *adjusted_mode)
+int intel_vrr_compute_vmin(struct intel_crtc_state *crtc_state)
 {
-	int vmin;
-	const struct drm_display_info *info = &connector->base.display_info;
-
-	vmin = DIV_ROUND_UP(adjusted_mode->crtc_clock * 1000,
-			    adjusted_mode->crtc_htotal * info->monitor_range.max_vfreq);
-	vmin = max_t(int, vmin, adjusted_mode->crtc_vtotal);
-
-	return vmin;
+	/*
+	 * To make fixed rr and vrr work seamless the guardband/pipeline full
+	 * should be set such that it satisfies both the fixed and variable
+	 * timings.
+	 * For this set the vmin as crtc_vtotal. With this we never need to
+	 * change anything to do with the guardband.
+	 */
+	return crtc_state->hw.adjusted_mode.crtc_vtotal;
 }
 
 static
@@ -305,7 +304,7 @@  intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
 	if (HAS_LRR(display))
 		crtc_state->update_lrr = true;
 
-	vmin = intel_vrr_compute_vmin(connector, adjusted_mode);
+	vmin = intel_vrr_compute_vmin(crtc_state);
 	vmax = intel_vrr_compute_vmax(connector, adjusted_mode);
 
 	if (vmin >= vmax)