| Message ID | 20250224061717.1095226-8-ankit.k.nautiyal@intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Use VRR timing generator for fixed refresh rate modes | expand |
On Mon, Feb 24, 2025 at 11:47:04AM +0530, Ankit Nautiyal wrote: > Currently we always compute the timings as if vrr is enabled. > With this approach the state checker becomes complicated when we > introduce fixed refresh rate mode with vrr timing generator. > > To avoid the complications, instead of always computing vrr timings, we > compute vrr timings based on uapi.vrr_enable knob. > So when the knob is disabled we always compute vmin=flipline=vmax. > > v2: Use actual timings without any adjustments while preparing for > fixed timings in compute_config. (Ville) > > Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/display/intel_vrr.c | 70 ++++++++++++++++++++++++ > 1 file changed, 70 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c > index b6120ff1a87c..45efcb57c77a 100644 > --- a/drivers/gpu/drm/i915/display/intel_vrr.c > +++ b/drivers/gpu/drm/i915/display/intel_vrr.c > @@ -246,6 +246,65 @@ void intel_vrr_compute_vrr_timings(struct intel_crtc_state *crtc_state) > crtc_state->mode_flags |= I915_MODE_FLAG_VRR; > } > > +/* > + * For fixed refresh rate mode Vmin, Vmax and Flipline all are set to > + * Vtotal value. > + */ > +static > +int intel_vrr_fixed_rr_vtotal(const struct intel_crtc_state *crtc_state) > +{ > + struct intel_display *display = to_intel_display(crtc_state); > + int crtc_vtotal = crtc_state->hw.adjusted_mode.crtc_vtotal; > + > + if (DISPLAY_VER(display) >= 13) > + return crtc_vtotal; > + else > + return crtc_vtotal - > + intel_vrr_real_vblank_delay(crtc_state); > +} > + > +static > +int intel_vrr_fixed_rr_vmax(const struct intel_crtc_state *crtc_state) > +{ > + return intel_vrr_fixed_rr_vtotal(crtc_state); > +} > + > +static > +int intel_vrr_fixed_rr_vmin(const struct intel_crtc_state *crtc_state) > +{ > + struct intel_display *display = to_intel_display(crtc_state); > + > + return intel_vrr_fixed_rr_vtotal(crtc_state) - > + intel_vrr_flipline_offset(display); > +} > + > +static > +int intel_vrr_fixed_rr_flipline(const struct intel_crtc_state *crtc_state) > +{ > + return intel_vrr_fixed_rr_vtotal(crtc_state); > +} > + > +static > +void intel_vrr_set_fixed_rr_timings(const struct intel_crtc_state *crtc_state) > +{ > + struct intel_display *display = to_intel_display(crtc_state); > + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > + > + intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder), > + intel_vrr_fixed_rr_vmin(crtc_state) - 1); > + intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder), > + intel_vrr_fixed_rr_vmax(crtc_state) - 1); > + intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder), > + intel_vrr_fixed_rr_flipline(crtc_state) - 1); > +} > + > +static > +void intel_vrr_prepare_fixed_timings(struct intel_crtc_state *crtc_state) > +{ > + crtc_state->vrr.vmax = intel_vrr_vmin_flipline(crtc_state); > + crtc_state->vrr.flipline = intel_vrr_vmin_flipline(crtc_state); > +} > + > static > int intel_vrr_compute_vmin(struct intel_crtc_state *crtc_state) > { > @@ -326,6 +385,8 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, > intel_vrr_compute_vrr_timings(crtc_state); > else if (is_cmrr_frac_required(crtc_state) && is_edp) > intel_vrr_compute_cmrr_timings(crtc_state); > + else > + intel_vrr_prepare_fixed_timings(crtc_state); > > if (HAS_AS_SDP(display)) { > crtc_state->vrr.vsync_start = > @@ -497,6 +558,13 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state) > if (!crtc_state->vrr.enable) > return; > > + intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder), > + crtc_state->vrr.vmin - 1); > + intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder), > + crtc_state->vrr.vmax - 1); > + intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder), > + crtc_state->vrr.flipline - 1); > + > intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), > TRANS_PUSH_EN); > > @@ -524,6 +592,8 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) > TRANS_VRR_STATUS(display, cpu_transcoder), > VRR_STATUS_VRR_EN_LIVE, 1000); > intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0); > + > + intel_vrr_set_fixed_rr_timings(old_crtc_state); > } > > static > -- > 2.45.2
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index b6120ff1a87c..45efcb57c77a 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -246,6 +246,65 @@ void intel_vrr_compute_vrr_timings(struct intel_crtc_state *crtc_state) crtc_state->mode_flags |= I915_MODE_FLAG_VRR; } +/* + * For fixed refresh rate mode Vmin, Vmax and Flipline all are set to + * Vtotal value. + */ +static +int intel_vrr_fixed_rr_vtotal(const struct intel_crtc_state *crtc_state) +{ + struct intel_display *display = to_intel_display(crtc_state); + int crtc_vtotal = crtc_state->hw.adjusted_mode.crtc_vtotal; + + if (DISPLAY_VER(display) >= 13) + return crtc_vtotal; + else + return crtc_vtotal - + intel_vrr_real_vblank_delay(crtc_state); +} + +static +int intel_vrr_fixed_rr_vmax(const struct intel_crtc_state *crtc_state) +{ + return intel_vrr_fixed_rr_vtotal(crtc_state); +} + +static +int intel_vrr_fixed_rr_vmin(const struct intel_crtc_state *crtc_state) +{ + struct intel_display *display = to_intel_display(crtc_state); + + return intel_vrr_fixed_rr_vtotal(crtc_state) - + intel_vrr_flipline_offset(display); +} + +static +int intel_vrr_fixed_rr_flipline(const struct intel_crtc_state *crtc_state) +{ + return intel_vrr_fixed_rr_vtotal(crtc_state); +} + +static +void intel_vrr_set_fixed_rr_timings(const struct intel_crtc_state *crtc_state) +{ + struct intel_display *display = to_intel_display(crtc_state); + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; + + intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder), + intel_vrr_fixed_rr_vmin(crtc_state) - 1); + intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder), + intel_vrr_fixed_rr_vmax(crtc_state) - 1); + intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder), + intel_vrr_fixed_rr_flipline(crtc_state) - 1); +} + +static +void intel_vrr_prepare_fixed_timings(struct intel_crtc_state *crtc_state) +{ + crtc_state->vrr.vmax = intel_vrr_vmin_flipline(crtc_state); + crtc_state->vrr.flipline = intel_vrr_vmin_flipline(crtc_state); +} + static int intel_vrr_compute_vmin(struct intel_crtc_state *crtc_state) { @@ -326,6 +385,8 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, intel_vrr_compute_vrr_timings(crtc_state); else if (is_cmrr_frac_required(crtc_state) && is_edp) intel_vrr_compute_cmrr_timings(crtc_state); + else + intel_vrr_prepare_fixed_timings(crtc_state); if (HAS_AS_SDP(display)) { crtc_state->vrr.vsync_start = @@ -497,6 +558,13 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state) if (!crtc_state->vrr.enable) return; + intel_de_write(display, TRANS_VRR_VMIN(display, cpu_transcoder), + crtc_state->vrr.vmin - 1); + intel_de_write(display, TRANS_VRR_VMAX(display, cpu_transcoder), + crtc_state->vrr.vmax - 1); + intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder), + crtc_state->vrr.flipline - 1); + intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), TRANS_PUSH_EN); @@ -524,6 +592,8 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) TRANS_VRR_STATUS(display, cpu_transcoder), VRR_STATUS_VRR_EN_LIVE, 1000); intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0); + + intel_vrr_set_fixed_rr_timings(old_crtc_state); } static
Currently we always compute the timings as if vrr is enabled. With this approach the state checker becomes complicated when we introduce fixed refresh rate mode with vrr timing generator. To avoid the complications, instead of always computing vrr timings, we compute vrr timings based on uapi.vrr_enable knob. So when the knob is disabled we always compute vmin=flipline=vmax. v2: Use actual timings without any adjustments while preparing for fixed timings in compute_config. (Ville) Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> --- drivers/gpu/drm/i915/display/intel_vrr.c | 70 ++++++++++++++++++++++++ 1 file changed, 70 insertions(+)