| Message ID | 20250224063104.308242-1-nitin.r.gote@intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | drm/i915/gt: Add a delay to let engine resumes correctly | expand |
Hi, Changes introduced with this patch is not related to the below Possible regression or failure. Please update CBL filters and re-report. Thanks, Nitin
Hi,
https://patchwork.freedesktop.org/series/145327/ - Re-reported.
i915.CI.BAT - Re-reported.
Thanks,
Ravali.
From: I915-ci-infra <i915-ci-infra-bounces@lists.freedesktop.org> On Behalf Of Gote, Nitin R
Sent: 25 February 2025 11:49
To: I915-ci-infra@lists.freedesktop.org
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: ✗ i915.CI.BAT: failure for drm/i915/gt: Add a delay to let engine resumes correctly
Hi,
Changes introduced with this patch is not related to the below Possible regression or failure.
Please update CBL filters and re-report.
Thanks,
Nitin
Hi, Changes introduced with this patch is not related to the below Possible regression or failure. Please update CBL filters and re-report. Thanks, Nitin
Hi Nitin, [...] > Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13650 [...] > ENGINE_READ_FW(engine, RING_START)); > + /* > + * Sometimes engine head failed to set to zero even after writing into it. > + * Use 20ms delay to let engine resumes from correct RING_HEAD. > + * Experimented different values and determined that 20ms works best > + * based on testing. > + */ > + mdelay(20); Since we do not propagate the errors returned from `stop_ring()` function and the linked issue is not a failure, because the subtest succeeds, I wonder if we could lower the severity of this log to a warning. Regardless of whether you consider my suggestion or not, the patch looks good to me: Reviewed-by: Krzysztof Karas <krzysztof.karas@intel.com> Best Regards, Krzysztof
diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c b/drivers/gpu/drm/i915/gt/intel_ring_submission.c index 6e9977b2d180..5576f000e965 100644 --- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c +++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c @@ -365,6 +365,13 @@ static void reset_prepare(struct intel_engine_cs *engine) ENGINE_READ_FW(engine, RING_HEAD), ENGINE_READ_FW(engine, RING_TAIL), ENGINE_READ_FW(engine, RING_START)); + /* + * Sometimes engine head failed to set to zero even after writing into it. + * Use 20ms delay to let engine resumes from correct RING_HEAD. + * Experimented different values and determined that 20ms works best + * based on testing. + */ + mdelay(20); if (!stop_ring(engine)) { drm_err(&engine->i915->drm, "failed to set %s head to zero "
Sometimes engine reset fails because the engine resumes from an incorrect RING_HEAD. Engine head failed to set to zero even after writing into it. This is a timing issue and we experimented different values and found out that 20ms delay works best based on testing. So, add a 20ms delay to let engine resumes from correct RING_HEAD. Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13650 Signed-off-by: Nitin Gote <nitin.r.gote@intel.com> --- drivers/gpu/drm/i915/gt/intel_ring_submission.c | 7 +++++++ 1 file changed, 7 insertions(+)