From patchwork Tue Feb 25 07:33:51 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arun R Murthy X-Patchwork-Id: 13989407 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 10948C021BE for ; Tue, 25 Feb 2025 07:48:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7250B10E592; Tue, 25 Feb 2025 07:48:33 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="FfYPbrrv"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id E953610E591; Tue, 25 Feb 2025 07:48:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1740469713; x=1772005713; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=0WgbfTEwrZrdSlEBXZfv66GlzTA72Kz8ADpsq1JTsy8=; b=FfYPbrrvmbErCaFfef0qJ0mwZQDZZHMgXai4wo3H4izO5Da0UowImhyR Mk6jkWsPAoQ9NxL2wD4WSEIYshC5g1Jv6qtjt4NHbHOMXmArubCxzRU41 FOsffyeoCffy8PB7R/Ap3FvHMMQhhngS4zwLNMmqqT8kFBFcbMTD3UT6N 6updC3iMfjhWiNOR8ndw71K1YMfPaOeECris1NMjjYZxCjonJ5MCHZIF1 WtMIU1+eFd5C0dHAPp1B+ZF09Ejm5rXDR+JWXJR1a1741ahNs6D9Bu7rv 3QryNFlSXd0VmUpEJbZWXbOEY4ld1JzlnUu69q52yBuSqjzfz3tMiz9iw g==; X-CSE-ConnectionGUID: Qkl4ljpjQl6hryZXhvK3MQ== X-CSE-MsgGUID: 6AHYRAujQmS9BwgAB21hOA== X-IronPort-AV: E=McAfee;i="6700,10204,11355"; a="63726915" X-IronPort-AV: E=Sophos;i="6.13,313,1732608000"; d="scan'208";a="63726915" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Feb 2025 23:48:32 -0800 X-CSE-ConnectionGUID: Nfrpb2cGRuumPdAVLUELHQ== X-CSE-MsgGUID: JLa76mt6TBSPtmyftwmyeA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.13,313,1732608000"; d="scan'208";a="116330857" Received: from srr4-3-linux-106-armuthy.iind.intel.com ([10.190.238.56]) by fmviesa007.fm.intel.com with ESMTP; 24 Feb 2025 23:48:30 -0800 From: Arun R Murthy Date: Tue, 25 Feb 2025 13:03:51 +0530 Subject: [PATCH v7 1/3] drm/plane: Add new plane property IN_FORMATS_ASYNC MIME-Version: 1.0 Message-Id: <20250225-asyn-v7-1-20b81122f4ce@intel.com> References: <20250225-asyn-v7-0-20b81122f4ce@intel.com> In-Reply-To: <20250225-asyn-v7-0-20b81122f4ce@intel.com> To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, ville.syrjala@linux.intel.com Cc: Arun R Murthy , Chaitanya Kumar Borah , Naveen Kumar X-Mailer: b4 0.15-dev X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" There exists a property IN_FORMATS which exposes the plane supported modifiers/formats to the user. In some platforms when asynchronous flip are used all of modifiers/formats mentioned in IN_FORMATS are not supported. This patch adds a new plane property IN_FORMATS_ASYNC to expose the async flip supported modifiers/formats so that user can use this information ahead and do flip with unsupported formats/modifiers. This will save flip failures. Add a new function pointer similar to format_mod_supported specifically for asynchronous flip. v2: Remove async variable from drm_plane (Ville) v3: Add new function pointer for async (Ville) v5: Typo corrected in commit message & some correction in the kernel documentation. (Chaitanya) v7: Place IN_FORMATS_ASYNC next to IN_FORMATS (Ville) Signed-off-by: Arun R Murthy Reviewed-by: Chaitanya Kumar Borah Tested-by: Naveen Kumar --- drivers/gpu/drm/drm_mode_config.c | 7 +++++++ drivers/gpu/drm/drm_plane.c | 8 ++++++++ include/drm/drm_mode_config.h | 6 ++++++ include/drm/drm_plane.h | 17 +++++++++++++++++ 4 files changed, 38 insertions(+) diff --git a/drivers/gpu/drm/drm_mode_config.c b/drivers/gpu/drm/drm_mode_config.c index 8642a2fb25a90116dab975aa0ab6b51deafb4b96..b4239fd04e9da4d4b5cfccdef1d3dde9556f322d 100644 --- a/drivers/gpu/drm/drm_mode_config.c +++ b/drivers/gpu/drm/drm_mode_config.c @@ -381,6 +381,13 @@ static int drm_mode_create_standard_properties(struct drm_device *dev) return -ENOMEM; dev->mode_config.modifiers_property = prop; + prop = drm_property_create(dev, + DRM_MODE_PROP_IMMUTABLE | DRM_MODE_PROP_BLOB, + "IN_FORMATS_ASYNC", 0); + if (!prop) + return -ENOMEM; + dev->mode_config.async_modifiers_property = prop; + prop = drm_property_create(dev, DRM_MODE_PROP_IMMUTABLE | DRM_MODE_PROP_BLOB, "SIZE_HINTS", 0); diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c index a28b22fdd7a41aca82d097d42237851da9a0a79b..fe181c1002171acc68d3054c2d178f9b9f501fe2 100644 --- a/drivers/gpu/drm/drm_plane.c +++ b/drivers/gpu/drm/drm_plane.c @@ -141,6 +141,14 @@ * various bugs in this area with inconsistencies between the capability * flag and per-plane properties. * + * IN_FORMATS_ASYNC: + * Blob property which contains the set of buffer format and modifier + * pairs supported by this plane for asynchronous flips. The blob is a struct + * drm_format_modifier_blob. Userspace cannot change this property. This is an + * optional property and if not present then user should expect a failure in + * atomic ioctl when the modifier/format is not supported by that plane under + * asynchronous flip. + * * SIZE_HINTS: * Blob property which contains the set of recommended plane size * which can used for simple "cursor like" use cases (eg. no scaling). diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h index 271765e2e9f2da62aaf0d258828ef4196e14822e..0c116d6dfd277262b1a4c0f097fce2d719f43844 100644 --- a/include/drm/drm_mode_config.h +++ b/include/drm/drm_mode_config.h @@ -936,6 +936,12 @@ struct drm_mode_config { */ struct drm_property *modifiers_property; + /** + * @async_modifiers_property: Plane property to list support modifier/format + * combination for asynchronous flips. + */ + struct drm_property *async_modifiers_property; + /** * @size_hints_property: Plane SIZE_HINTS property. */ diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h index dd718c62ac31bf16606f3ee9f025a5b171cd1e67..4393a0e9edf91ccfd78ef62b168b9313187c1a81 100644 --- a/include/drm/drm_plane.h +++ b/include/drm/drm_plane.h @@ -549,6 +549,23 @@ struct drm_plane_funcs { */ bool (*format_mod_supported)(struct drm_plane *plane, uint32_t format, uint64_t modifier); + /** + * @format_mod_supported_async: + * + * This optional hook is used for the DRM to determine if for + * asynchronous flip the given format/modifier combination is valid for + * the plane. This allows the DRM to generate the correct format + * bitmask (which formats apply to which modifier), and to validate + * modifiers at atomic_check time. + * + * Returns: + * + * True if the given modifier is valid for that format on the plane. + * False otherwise. + */ + bool (*format_mod_supported_async)(struct drm_plane *plane, + uint32_t format, uint64_t modifier); + }; /**