| Message ID | 20250227-xe3lpd-power-domain-audio-playback-v1-1-5765f21da977@intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | drm/i915/xe3lpd: Map POWER_DOMAIN_AUDIO_PLAYBACK to DC_off | expand |
Hi, On Thu, 27 Feb 2025, Gustavo Sousa wrote: > In Xe3_LPD, display audio has the core audio logic located in PG0 and > per-transcoder logic in the same power well that provides power for the > transcoder [1]. [...] > Since intel_audio_component_get_power() uses > POWER_DOMAIN_AUDIO_PLAYBACK, make sure to map that power domain to > DC_off power well, so that we disable dynamic DC states (which includes > DC6) while the audio driver needs display audio power. [...] > +++ b/drivers/gpu/drm/i915/display/intel_display_power_map.c > @@ -1694,6 +1694,7 @@ I915_DECL_PW_DOMAINS(xe3lpd_pwdoms_dc_off, > XE3LPD_PW_C_POWER_DOMAINS, > XE3LPD_PW_D_POWER_DOMAINS, > POWER_DOMAIN_AUDIO_MMIO, > + POWER_DOMAIN_AUDIO_PLAYBACK, > POWER_DOMAIN_INIT); ack, this looks good and covers audio expectations for drm_audio_component.h usage: Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com> Br, Kai
diff --git a/drivers/gpu/drm/i915/display/intel_display_power_map.c b/drivers/gpu/drm/i915/display/intel_display_power_map.c index 0c8ac1af6db7e005b9bf5b33d1c2e4cebbde2524..572383a817daa749f3579647855c2a858e010716 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power_map.c +++ b/drivers/gpu/drm/i915/display/intel_display_power_map.c @@ -1694,6 +1694,7 @@ I915_DECL_PW_DOMAINS(xe3lpd_pwdoms_dc_off, XE3LPD_PW_C_POWER_DOMAINS, XE3LPD_PW_D_POWER_DOMAINS, POWER_DOMAIN_AUDIO_MMIO, + POWER_DOMAIN_AUDIO_PLAYBACK, POWER_DOMAIN_INIT); static const struct i915_power_well_desc xe3lpd_power_wells_dcoff[] = {
In Xe3_LPD, display audio has the core audio logic located in PG0 and per-transcoder logic in the same power well that provides power for the transcoder [1]. For stuff like audio device enumeration, we need to ensure that PG0 is turned on. For playback, we additionally need the transcoder's power well to be enabled. That essentially means that, for audio playback, there isn't a special power well that needs to be enabled, because modeset sequences will ensure that the required power wells are enabled. That said, there might be cases where PG0 could be disabled due to display entering DC6 while the audio driver tries to interact with the graphics driver for stuff like audio device enumeration. We recently hit that kind of scenario, where "aplay -l" was being used to enumerate audio devices on a PTL machine with PSR enabled and no external displays attached. Since intel_audio_component_get_power() uses POWER_DOMAIN_AUDIO_PLAYBACK, make sure to map that power domain to DC_off power well, so that we disable dynamic DC states (which includes DC6) while the audio driver needs display audio power. [1] The core-audio vs per-transcoder logic split is not really new in Xe3_LPD. This is also true for previous display generations. We need to figure out the correct version where this split happened so that we can apply fixes in the current power domain mapping. Bspec: 72519 Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com> --- drivers/gpu/drm/i915/display/intel_display_power_map.c | 1 + 1 file changed, 1 insertion(+) --- base-commit: 4a2f1c823287a84dc0bd46c5a93545dfe49967f2 change-id: 20250226-xe3lpd-power-domain-audio-playback-8fb255190c3a Best regards,