[04/10] drm/i915/dp_mst: Enable fractional link bpps on MST

Commit Message

Imre Deak April 8, 2025, 9:43 p.m. UTC

Enable using a fractional (compressed) link bpp on an MST link, if this
is supported.

Signed-off-by: Imre Deak <[e-mail]>
---
 drivers/gpu/drm/i915/display/intel_dp.c     | 2 +-
 drivers/gpu/drm/i915/display/intel_dp.h     | 2 ++
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 3 ++-
 3 files changed, 5 insertions(+), 2 deletions(-)

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 2944ae0d53e32..3cf8d6510bf90 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2103,7 +2103,7 @@  static int dsc_src_max_compressed_bpp(struct intel_dp *intel_dp)
 /*
  * Note: for pre-13 display you still need to check the validity of each step.
  */
-static int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector)
+int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector)
 {
 	struct intel_display *display = to_intel_display(connector);
 	u8 incr = drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index f3ca6966abe00..c974e4b97338a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -210,4 +210,6 @@  bool intel_dp_has_connector(struct intel_dp *intel_dp,
 int intel_dp_dsc_max_src_input_bpc(struct intel_display *display);
 int intel_dp_dsc_min_src_input_bpc(void);
 
+int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector);
+
 #endif /* __INTEL_DP_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 4e607c0853cbd..35214d9a8c781 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -495,7 +495,8 @@  static int mst_stream_dsc_compute_link_config(struct intel_dp *intel_dp,
 					      intel_dp_dsc_nearest_valid_bpp(display,
 									     limits->link.max_bpp_x16,
 									     crtc_state->pipe_bpp),
-					      fxp_q4_from_int(1), true);
+					      intel_dp_dsc_bpp_step_x16(connector),
+					      true);
 }
 
 static int mst_stream_update_slots(struct intel_dp *intel_dp,