| Message ID | 31337adcaca1333724600b0afe6e3880f0948d5e.1717514638.git.jani.nikula@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: finish the job of removing implicit dev_priv | expand |
On Tue, Jun 04, 2024 at 06:26:14PM +0300, Jani Nikula wrote: > Avoid the implicit dev_priv local variable use, and pass dev_priv > explicitly to the PIPE_LINK_M2 register macro. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 6 ++++-- > drivers/gpu/drm/i915/i915_reg.h | 2 +- > drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 8 ++++---- > 3 files changed, 9 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index eef317984564..9df8e486a86e 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -2663,7 +2663,8 @@ void intel_cpu_transcoder_set_m2_n2(struct intel_crtc *crtc, > intel_set_m_n(dev_priv, m_n, > PIPE_DATA_M2(dev_priv, transcoder), > PIPE_DATA_N2(dev_priv, transcoder), > - PIPE_LINK_M2(transcoder), PIPE_LINK_N2(transcoder)); > + PIPE_LINK_M2(dev_priv, transcoder), > + PIPE_LINK_N2(transcoder)); > } > > static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_state) > @@ -3362,7 +3363,8 @@ void intel_cpu_transcoder_get_m2_n2(struct intel_crtc *crtc, > intel_get_m_n(dev_priv, m_n, > PIPE_DATA_M2(dev_priv, transcoder), > PIPE_DATA_N2(dev_priv, transcoder), > - PIPE_LINK_M2(transcoder), PIPE_LINK_N2(transcoder)); > + PIPE_LINK_M2(dev_priv, transcoder), > + PIPE_LINK_N2(transcoder)); > } > > static void ilk_get_pfit_config(struct intel_crtc_state *crtc_state) > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index ac9ef4bd176e..2a73ad779e26 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -2385,7 +2385,7 @@ > #define PIPE_DATA_N2(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_DATA_N2) > #define PIPE_LINK_M1(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_M1) > #define PIPE_LINK_N1(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_N1) > -#define PIPE_LINK_M2(tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_M2) > +#define PIPE_LINK_M2(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_M2) > #define PIPE_LINK_N2(tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_N2) > > /* CPU panel fitter */ > diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c > index 00ce7147a9b6..d1a51ae042f1 100644 > --- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c > +++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c > @@ -272,7 +272,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) > MMIO_D(PIPE_DATA_N2(dev_priv, TRANSCODER_A)); > MMIO_D(PIPE_LINK_M1(dev_priv, TRANSCODER_A)); > MMIO_D(PIPE_LINK_N1(dev_priv, TRANSCODER_A)); > - MMIO_D(PIPE_LINK_M2(TRANSCODER_A)); > + MMIO_D(PIPE_LINK_M2(dev_priv, TRANSCODER_A)); > MMIO_D(PIPE_LINK_N2(TRANSCODER_A)); > MMIO_D(PIPE_DATA_M1(dev_priv, TRANSCODER_B)); > MMIO_D(PIPE_DATA_N1(dev_priv, TRANSCODER_B)); > @@ -280,7 +280,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) > MMIO_D(PIPE_DATA_N2(dev_priv, TRANSCODER_B)); > MMIO_D(PIPE_LINK_M1(dev_priv, TRANSCODER_B)); > MMIO_D(PIPE_LINK_N1(dev_priv, TRANSCODER_B)); > - MMIO_D(PIPE_LINK_M2(TRANSCODER_B)); > + MMIO_D(PIPE_LINK_M2(dev_priv, TRANSCODER_B)); > MMIO_D(PIPE_LINK_N2(TRANSCODER_B)); > MMIO_D(PIPE_DATA_M1(dev_priv, TRANSCODER_C)); > MMIO_D(PIPE_DATA_N1(dev_priv, TRANSCODER_C)); > @@ -288,7 +288,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) > MMIO_D(PIPE_DATA_N2(dev_priv, TRANSCODER_C)); > MMIO_D(PIPE_LINK_M1(dev_priv, TRANSCODER_C)); > MMIO_D(PIPE_LINK_N1(dev_priv, TRANSCODER_C)); > - MMIO_D(PIPE_LINK_M2(TRANSCODER_C)); > + MMIO_D(PIPE_LINK_M2(dev_priv, TRANSCODER_C)); > MMIO_D(PIPE_LINK_N2(TRANSCODER_C)); > MMIO_D(PIPE_DATA_M1(dev_priv, TRANSCODER_EDP)); > MMIO_D(PIPE_DATA_N1(dev_priv, TRANSCODER_EDP)); > @@ -296,7 +296,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) > MMIO_D(PIPE_DATA_N2(dev_priv, TRANSCODER_EDP)); > MMIO_D(PIPE_LINK_M1(dev_priv, TRANSCODER_EDP)); > MMIO_D(PIPE_LINK_N1(dev_priv, TRANSCODER_EDP)); > - MMIO_D(PIPE_LINK_M2(TRANSCODER_EDP)); > + MMIO_D(PIPE_LINK_M2(dev_priv, TRANSCODER_EDP)); > MMIO_D(PIPE_LINK_N2(TRANSCODER_EDP)); > MMIO_D(PF_CTL(PIPE_A)); > MMIO_D(PF_WIN_SZ(PIPE_A)); > -- > 2.39.2 >
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index eef317984564..9df8e486a86e 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -2663,7 +2663,8 @@ void intel_cpu_transcoder_set_m2_n2(struct intel_crtc *crtc, intel_set_m_n(dev_priv, m_n, PIPE_DATA_M2(dev_priv, transcoder), PIPE_DATA_N2(dev_priv, transcoder), - PIPE_LINK_M2(transcoder), PIPE_LINK_N2(transcoder)); + PIPE_LINK_M2(dev_priv, transcoder), + PIPE_LINK_N2(transcoder)); } static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_state) @@ -3362,7 +3363,8 @@ void intel_cpu_transcoder_get_m2_n2(struct intel_crtc *crtc, intel_get_m_n(dev_priv, m_n, PIPE_DATA_M2(dev_priv, transcoder), PIPE_DATA_N2(dev_priv, transcoder), - PIPE_LINK_M2(transcoder), PIPE_LINK_N2(transcoder)); + PIPE_LINK_M2(dev_priv, transcoder), + PIPE_LINK_N2(transcoder)); } static void ilk_get_pfit_config(struct intel_crtc_state *crtc_state) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index ac9ef4bd176e..2a73ad779e26 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -2385,7 +2385,7 @@ #define PIPE_DATA_N2(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_DATA_N2) #define PIPE_LINK_M1(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_M1) #define PIPE_LINK_N1(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_N1) -#define PIPE_LINK_M2(tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_M2) +#define PIPE_LINK_M2(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_M2) #define PIPE_LINK_N2(tran) _MMIO_TRANS2(dev_priv, tran, _PIPEA_LINK_N2) /* CPU panel fitter */ diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c index 00ce7147a9b6..d1a51ae042f1 100644 --- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c +++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c @@ -272,7 +272,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(PIPE_DATA_N2(dev_priv, TRANSCODER_A)); MMIO_D(PIPE_LINK_M1(dev_priv, TRANSCODER_A)); MMIO_D(PIPE_LINK_N1(dev_priv, TRANSCODER_A)); - MMIO_D(PIPE_LINK_M2(TRANSCODER_A)); + MMIO_D(PIPE_LINK_M2(dev_priv, TRANSCODER_A)); MMIO_D(PIPE_LINK_N2(TRANSCODER_A)); MMIO_D(PIPE_DATA_M1(dev_priv, TRANSCODER_B)); MMIO_D(PIPE_DATA_N1(dev_priv, TRANSCODER_B)); @@ -280,7 +280,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(PIPE_DATA_N2(dev_priv, TRANSCODER_B)); MMIO_D(PIPE_LINK_M1(dev_priv, TRANSCODER_B)); MMIO_D(PIPE_LINK_N1(dev_priv, TRANSCODER_B)); - MMIO_D(PIPE_LINK_M2(TRANSCODER_B)); + MMIO_D(PIPE_LINK_M2(dev_priv, TRANSCODER_B)); MMIO_D(PIPE_LINK_N2(TRANSCODER_B)); MMIO_D(PIPE_DATA_M1(dev_priv, TRANSCODER_C)); MMIO_D(PIPE_DATA_N1(dev_priv, TRANSCODER_C)); @@ -288,7 +288,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(PIPE_DATA_N2(dev_priv, TRANSCODER_C)); MMIO_D(PIPE_LINK_M1(dev_priv, TRANSCODER_C)); MMIO_D(PIPE_LINK_N1(dev_priv, TRANSCODER_C)); - MMIO_D(PIPE_LINK_M2(TRANSCODER_C)); + MMIO_D(PIPE_LINK_M2(dev_priv, TRANSCODER_C)); MMIO_D(PIPE_LINK_N2(TRANSCODER_C)); MMIO_D(PIPE_DATA_M1(dev_priv, TRANSCODER_EDP)); MMIO_D(PIPE_DATA_N1(dev_priv, TRANSCODER_EDP)); @@ -296,7 +296,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(PIPE_DATA_N2(dev_priv, TRANSCODER_EDP)); MMIO_D(PIPE_LINK_M1(dev_priv, TRANSCODER_EDP)); MMIO_D(PIPE_LINK_N1(dev_priv, TRANSCODER_EDP)); - MMIO_D(PIPE_LINK_M2(TRANSCODER_EDP)); + MMIO_D(PIPE_LINK_M2(dev_priv, TRANSCODER_EDP)); MMIO_D(PIPE_LINK_N2(TRANSCODER_EDP)); MMIO_D(PF_CTL(PIPE_A)); MMIO_D(PF_WIN_SZ(PIPE_A));
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the PIPE_LINK_M2 register macro. Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/display/intel_display.c | 6 ++++-- drivers/gpu/drm/i915/i915_reg.h | 2 +- drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 8 ++++---- 3 files changed, 9 insertions(+), 7 deletions(-)