From patchwork Sun Jun 8 21:29:01 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Richter X-Patchwork-Id: 4317281 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 5881D9F170 for ; Sun, 8 Jun 2014 21:29:19 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4932520173 for ; Sun, 8 Jun 2014 21:29:18 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 8EBBA20166 for ; Sun, 8 Jun 2014 21:29:16 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D102B8932E; Sun, 8 Jun 2014 14:29:15 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from hydra.rus.uni-stuttgart.de (hydra.rus.uni-stuttgart.de [129.69.192.3]) by gabe.freedesktop.org (Postfix) with ESMTP id 3E4448932E for ; Sun, 8 Jun 2014 14:29:14 -0700 (PDT) Received: from localhost (localhost [127.0.0.1]) by hydra.rus.uni-stuttgart.de (Postfix) with ESMTP id 7C16E12C6BC; Sun, 8 Jun 2014 23:29:09 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d= rus.uni-stuttgart.de; h=content-type:content-type:in-reply-to :references:subject:subject:user-agent:from:from:date:date :message-id:received:received; s=dkim20100209; t=1402262944; x= 1404077345; bh=4GN/vMMvj7wZsijuRkqXfftaHF1JRUsmZ5j69/6OdBY=; b=e p8eeBYxq2qox43F6UUxtl6zEOzMJPGIN2sgodYD4py8cJIbHwGCSrL7Nf+K9NzkS tnQxqxOTYhYd7LkCZlyqQrXxy9bRIZFYuLYVck9q7KtM7z4ZhByHxJkf3jm/xJKy p2Evyer/0PxXPy+wUIKSfTVIkgKpJe2DoQfigWc0dI= X-Virus-Scanned: by amavisd-new at hydra.rus.uni-stuttgart.de Received: from hydra.rus.uni-stuttgart.de ([127.0.0.1]) by localhost (hydra.rus.uni-stuttgart.de [127.0.0.1]) (amavisd-new, port 10031) with ESMTP id RYTlpDeYomLY; Sun, 8 Jun 2014 23:29:04 +0200 (CEST) Received: from [192.168.2.107] (p57971C73.dip0.t-ipconnect.de [87.151.28.115]) (using TLSv1 with cipher ECDHE-RSA-AES128-SHA (128/128 bits)) (Client did not present a certificate) (Authenticated sender: ac105036) by hydra.rus.uni-stuttgart.de (Postfix) with ESMTPSA; Sun, 8 Jun 2014 23:29:03 +0200 (CEST) Message-ID: <5394D59D.60703@rus.uni-stuttgart.de> Date: Sun, 08 Jun 2014 23:29:01 +0200 From: Thomas Richter User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Icedove/24.5.0 MIME-Version: 1.0 To: intel-gfx@lists.freedesktop.org References: <1401984964-25441-1-git-send-email-ville.syrjala@linux.intel.com> <1401984964-25441-2-git-send-email-ville.syrjala@linux.intel.com> <20140605204312.GA15324@nuc-i3427.alporthouse.com> <5390E243.2040100@rus.uni-stuttgart.de> <20140606084621.GF27580@intel.com> <5391F932.8010404@rus.uni-stuttgart.de> <20140606200814.GH27580@intel.com> In-Reply-To: <20140606200814.GH27580@intel.com> Subject: [Intel-gfx] [PATCH] Check for a min level when computing the watermark. X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Dear intel experts, the attached patch is a minimally invasive modification of the watermark computation for the 830GM chipset graphics. It adds a minimum watermark level to test against. The minimum value is zero for all other families of the intel chipset graphics, thus causing no change there. What is still strange is that the default watermark level is only used if the watermark level computation returns a value below zero, though values *below* the default value are acceptable as long as the are above or equal to zero. Anyhow, I keep it like this for the time being to avoid breaking anything. Greetings, Thomas From 4ff44b36c3ca8ac0255700aaa8999e75efbf9598 Mon Sep 17 00:00:00 2001 From: thor Date: Sat, 7 Jun 2014 22:23:16 +0200 Subject: [PATCH] Added a min watermark level. Signed-off-by: thor --- drivers/gpu/drm/i915/i915_reg.h | 1 + drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 16 ++++++++++++++++ 3 files changed, 18 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 286f05c..442240b 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3897,6 +3897,7 @@ enum punit_power_well { #define I915_FIFO_SIZE 95 #define I855GM_FIFO_SIZE 127 /* In cachelines */ #define I830_FIFO_SIZE 95 +#define I830_MIN_WM 8 #define VALLEYVIEW_MAX_WM 0xff #define G4X_MAX_WM 0x3f diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 78d4124..16d2f68 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -458,6 +458,7 @@ struct intel_plane { struct intel_watermark_params { unsigned long fifo_size; + unsigned long min_wm; unsigned long max_wm; unsigned long default_wm; unsigned long guard_size; diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index f83d1ff..ac8a832 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -866,6 +866,7 @@ static int i845_get_fifo_size(struct drm_device *dev, int plane) /* Pineview has different values for various configs */ static const struct intel_watermark_params pineview_display_wm = { .fifo_size = PINEVIEW_DISPLAY_FIFO, + .min_wm = 0, .max_wm = PINEVIEW_MAX_WM, .default_wm = PINEVIEW_DFT_WM, .guard_size = PINEVIEW_GUARD_WM, @@ -873,6 +874,7 @@ static const struct intel_watermark_params pineview_display_wm = { }; static const struct intel_watermark_params pineview_display_hplloff_wm = { .fifo_size = PINEVIEW_DISPLAY_FIFO, + .min_wm = 0, .max_wm = PINEVIEW_MAX_WM, .default_wm = PINEVIEW_DFT_HPLLOFF_WM, .guard_size = PINEVIEW_GUARD_WM, @@ -880,6 +882,7 @@ static const struct intel_watermark_params pineview_display_hplloff_wm = { }; static const struct intel_watermark_params pineview_cursor_wm = { .fifo_size = PINEVIEW_CURSOR_FIFO, + .min_wm = 0, .max_wm = PINEVIEW_CURSOR_MAX_WM, .default_wm = PINEVIEW_CURSOR_DFT_WM, .guard_size = PINEVIEW_CURSOR_GUARD_WM, @@ -887,6 +890,7 @@ static const struct intel_watermark_params pineview_cursor_wm = { }; static const struct intel_watermark_params pineview_cursor_hplloff_wm = { .fifo_size = PINEVIEW_CURSOR_FIFO, + .min_wm = 0, .max_wm = PINEVIEW_CURSOR_MAX_WM, .default_wm = PINEVIEW_CURSOR_DFT_WM, .guard_size = PINEVIEW_CURSOR_GUARD_WM, @@ -894,6 +898,7 @@ static const struct intel_watermark_params pineview_cursor_hplloff_wm = { }; static const struct intel_watermark_params g4x_wm_info = { .fifo_size = G4X_FIFO_SIZE, + .min_wm = 0, .max_wm = G4X_MAX_WM, .default_wm = G4X_MAX_WM, .guard_size = 2, @@ -901,6 +906,7 @@ static const struct intel_watermark_params g4x_wm_info = { }; static const struct intel_watermark_params g4x_cursor_wm_info = { .fifo_size = I965_CURSOR_FIFO, + .min_wm = 0, .max_wm = I965_CURSOR_MAX_WM, .default_wm = I965_CURSOR_DFT_WM, .guard_size = 2, @@ -908,6 +914,7 @@ static const struct intel_watermark_params g4x_cursor_wm_info = { }; static const struct intel_watermark_params valleyview_wm_info = { .fifo_size = VALLEYVIEW_FIFO_SIZE, + .min_wm = 0, .max_wm = VALLEYVIEW_MAX_WM, .default_wm = VALLEYVIEW_MAX_WM, .guard_size = 2, @@ -915,6 +922,7 @@ static const struct intel_watermark_params valleyview_wm_info = { }; static const struct intel_watermark_params valleyview_cursor_wm_info = { .fifo_size = I965_CURSOR_FIFO, + .min_wm = 0, .max_wm = VALLEYVIEW_CURSOR_MAX_WM, .default_wm = I965_CURSOR_DFT_WM, .guard_size = 2, @@ -922,6 +930,7 @@ static const struct intel_watermark_params valleyview_cursor_wm_info = { }; static const struct intel_watermark_params i965_cursor_wm_info = { .fifo_size = I965_CURSOR_FIFO, + .min_wm = 0, .max_wm = I965_CURSOR_MAX_WM, .default_wm = I965_CURSOR_DFT_WM, .guard_size = 2, @@ -929,6 +938,7 @@ static const struct intel_watermark_params i965_cursor_wm_info = { }; static const struct intel_watermark_params i945_wm_info = { .fifo_size = I945_FIFO_SIZE, + .min_wm = 0, .max_wm = I915_MAX_WM, .default_wm = 1, .guard_size = 2, @@ -936,6 +946,7 @@ static const struct intel_watermark_params i945_wm_info = { }; static const struct intel_watermark_params i915_wm_info = { .fifo_size = I915_FIFO_SIZE, + .min_wm = 0, .max_wm = I915_MAX_WM, .default_wm = 1, .guard_size = 2, @@ -943,6 +954,7 @@ static const struct intel_watermark_params i915_wm_info = { }; static const struct intel_watermark_params i830_wm_info = { .fifo_size = I855GM_FIFO_SIZE, + .min_wm = I830_MIN_WM, .max_wm = I915_MAX_WM, .default_wm = 1, .guard_size = 2, @@ -950,6 +962,7 @@ static const struct intel_watermark_params i830_wm_info = { }; static const struct intel_watermark_params i845_wm_info = { .fifo_size = I830_FIFO_SIZE, + .min_wm = I830_MIN_WM, .max_wm = I915_MAX_WM, .default_wm = 1, .guard_size = 2, @@ -1003,6 +1016,9 @@ static unsigned long intel_calculate_wm(unsigned long clock_in_khz, wm_size = wm->max_wm; if (wm_size <= 0) wm_size = wm->default_wm; + if (wm_size < (long)wm->min_wm) + wm_size = wm->min_wm; + return wm_size; } -- 1.7.10.4