From 4ff44b36c3ca8ac0255700aaa8999e75efbf9598 Mon Sep 17 00:00:00 2001
From: thor <thor@math.tu-berlin.de>
Date: Sat, 7 Jun 2014 22:23:16 +0200
Subject: [PATCH] Added a min watermark level.

Signed-off-by: thor <thor@math.tu-berlin.de>
---
 drivers/gpu/drm/i915/i915_reg.h  |    1 +
 drivers/gpu/drm/i915/intel_drv.h |    1 +
 drivers/gpu/drm/i915/intel_pm.c  |   16 ++++++++++++++++
 3 files changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 286f05c..442240b 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3897,6 +3897,7 @@ enum punit_power_well {
 #define I915_FIFO_SIZE		95
 #define I855GM_FIFO_SIZE	127 /* In cachelines */
 #define I830_FIFO_SIZE		95
+#define I830_MIN_WM		8
 
 #define VALLEYVIEW_MAX_WM	0xff
 #define G4X_MAX_WM		0x3f
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 78d4124..16d2f68 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -458,6 +458,7 @@ struct intel_plane {
 
 struct intel_watermark_params {
 	unsigned long fifo_size;
+	unsigned long min_wm;
 	unsigned long max_wm;
 	unsigned long default_wm;
 	unsigned long guard_size;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index f83d1ff..ac8a832 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -866,6 +866,7 @@ static int i845_get_fifo_size(struct drm_device *dev, int plane)
 /* Pineview has different values for various configs */
 static const struct intel_watermark_params pineview_display_wm = {
 	.fifo_size = PINEVIEW_DISPLAY_FIFO,
+	.min_wm = 0,
 	.max_wm = PINEVIEW_MAX_WM,
 	.default_wm = PINEVIEW_DFT_WM,
 	.guard_size = PINEVIEW_GUARD_WM,
@@ -873,6 +874,7 @@ static const struct intel_watermark_params pineview_display_wm = {
 };
 static const struct intel_watermark_params pineview_display_hplloff_wm = {
 	.fifo_size = PINEVIEW_DISPLAY_FIFO,
+	.min_wm = 0,
 	.max_wm = PINEVIEW_MAX_WM,
 	.default_wm = PINEVIEW_DFT_HPLLOFF_WM,
 	.guard_size = PINEVIEW_GUARD_WM,
@@ -880,6 +882,7 @@ static const struct intel_watermark_params pineview_display_hplloff_wm = {
 };
 static const struct intel_watermark_params pineview_cursor_wm = {
 	.fifo_size = PINEVIEW_CURSOR_FIFO,
+	.min_wm = 0,
 	.max_wm = PINEVIEW_CURSOR_MAX_WM,
 	.default_wm = PINEVIEW_CURSOR_DFT_WM,
 	.guard_size = PINEVIEW_CURSOR_GUARD_WM,
@@ -887,6 +890,7 @@ static const struct intel_watermark_params pineview_cursor_wm = {
 };
 static const struct intel_watermark_params pineview_cursor_hplloff_wm = {
 	.fifo_size = PINEVIEW_CURSOR_FIFO,
+	.min_wm = 0,
 	.max_wm = PINEVIEW_CURSOR_MAX_WM,
 	.default_wm = PINEVIEW_CURSOR_DFT_WM,
 	.guard_size = PINEVIEW_CURSOR_GUARD_WM,
@@ -894,6 +898,7 @@ static const struct intel_watermark_params pineview_cursor_hplloff_wm = {
 };
 static const struct intel_watermark_params g4x_wm_info = {
 	.fifo_size = G4X_FIFO_SIZE,
+	.min_wm = 0,
 	.max_wm = G4X_MAX_WM,
 	.default_wm = G4X_MAX_WM,
 	.guard_size = 2,
@@ -901,6 +906,7 @@ static const struct intel_watermark_params g4x_wm_info = {
 };
 static const struct intel_watermark_params g4x_cursor_wm_info = {
 	.fifo_size = I965_CURSOR_FIFO,
+	.min_wm = 0,
 	.max_wm = I965_CURSOR_MAX_WM,
 	.default_wm = I965_CURSOR_DFT_WM,
 	.guard_size = 2,
@@ -908,6 +914,7 @@ static const struct intel_watermark_params g4x_cursor_wm_info = {
 };
 static const struct intel_watermark_params valleyview_wm_info = {
 	.fifo_size = VALLEYVIEW_FIFO_SIZE,
+	.min_wm = 0,
 	.max_wm = VALLEYVIEW_MAX_WM,
 	.default_wm = VALLEYVIEW_MAX_WM,
 	.guard_size = 2,
@@ -915,6 +922,7 @@ static const struct intel_watermark_params valleyview_wm_info = {
 };
 static const struct intel_watermark_params valleyview_cursor_wm_info = {
 	.fifo_size = I965_CURSOR_FIFO,
+	.min_wm = 0,
 	.max_wm = VALLEYVIEW_CURSOR_MAX_WM,
 	.default_wm = I965_CURSOR_DFT_WM,
 	.guard_size = 2,
@@ -922,6 +930,7 @@ static const struct intel_watermark_params valleyview_cursor_wm_info = {
 };
 static const struct intel_watermark_params i965_cursor_wm_info = {
 	.fifo_size = I965_CURSOR_FIFO,
+	.min_wm = 0,
 	.max_wm = I965_CURSOR_MAX_WM,
 	.default_wm = I965_CURSOR_DFT_WM,
 	.guard_size = 2,
@@ -929,6 +938,7 @@ static const struct intel_watermark_params i965_cursor_wm_info = {
 };
 static const struct intel_watermark_params i945_wm_info = {
 	.fifo_size = I945_FIFO_SIZE,
+	.min_wm = 0,
 	.max_wm = I915_MAX_WM,
 	.default_wm = 1,
 	.guard_size = 2,
@@ -936,6 +946,7 @@ static const struct intel_watermark_params i945_wm_info = {
 };
 static const struct intel_watermark_params i915_wm_info = {
 	.fifo_size = I915_FIFO_SIZE,
+	.min_wm = 0,
 	.max_wm = I915_MAX_WM,
 	.default_wm = 1,
 	.guard_size = 2,
@@ -943,6 +954,7 @@ static const struct intel_watermark_params i915_wm_info = {
 };
 static const struct intel_watermark_params i830_wm_info = {
 	.fifo_size = I855GM_FIFO_SIZE,
+	.min_wm = I830_MIN_WM,
 	.max_wm = I915_MAX_WM,
 	.default_wm = 1,
 	.guard_size = 2,
@@ -950,6 +962,7 @@ static const struct intel_watermark_params i830_wm_info = {
 };
 static const struct intel_watermark_params i845_wm_info = {
 	.fifo_size = I830_FIFO_SIZE,
+	.min_wm = I830_MIN_WM,
 	.max_wm = I915_MAX_WM,
 	.default_wm = 1,
 	.guard_size = 2,
@@ -1003,6 +1016,9 @@ static unsigned long intel_calculate_wm(unsigned long clock_in_khz,
 		wm_size = wm->max_wm;
 	if (wm_size <= 0)
 		wm_size = wm->default_wm;
+	if (wm_size < (long)wm->min_wm)
+		wm_size = wm->min_wm;
+
 	return wm_size;
 }
 
-- 
1.7.10.4

