diff mbox series

[08/15] drm/i915/display: convert HAS_MBUS_JOINING() to struct intel_display

Message ID 754f1d16612082ef48e7e33b1240418549ed1407.1730740629.git.jani.nikula@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/display: convert display feature helpers to struct intel_display | expand

Commit Message

Jani Nikula Nov. 4, 2024, 5:19 p.m. UTC
Convert HAS_MBUS_JOINING() to struct intel_display. Do minimal drive-by
conversions to struct intel_display in the callers while at it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 .../drm/i915/display/intel_display_device.h    |  2 +-
 drivers/gpu/drm/i915/display/skl_watermark.c   | 18 ++++++++++--------
 2 files changed, 11 insertions(+), 9 deletions(-)

Comments

Govindapillai, Vinod Nov. 6, 2024, 10:27 a.m. UTC | #1
On Mon, 2024-11-04 at 19:19 +0200, Jani Nikula wrote:
> Convert HAS_MBUS_JOINING() to struct intel_display. Do minimal drive-by
> conversions to struct intel_display in the callers while at it.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  .../drm/i915/display/intel_display_device.h    |  2 +-
>  drivers/gpu/drm/i915/display/skl_watermark.c   | 18 ++++++++++--------
>  2 files changed, 11 insertions(+), 9 deletions(-)
> 

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h
> b/drivers/gpu/drm/i915/display/intel_display_device.h
> index b85b1d3ff708..a0fed40b7779 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -167,7 +167,7 @@ struct intel_display_platforms {
>  #define HAS_IPS(__display)             ((__display)->platform.haswell_ult || (__display)-
> >platform.broadwell)
>  #define HAS_LRR(i915)                  (DISPLAY_VER(i915) >= 12)
>  #define HAS_LSPCON(i915)               (IS_DISPLAY_VER(i915, 9, 10))
> -#define HAS_MBUS_JOINING(i915)         (IS_ALDERLAKE_P(i915) || DISPLAY_VER(i915) >= 14)
> +#define HAS_MBUS_JOINING(__display)    ((__display)->platform.alderlake_p ||
> DISPLAY_VER(__display) >= 14)
>  #define HAS_MSO(i915)                  (DISPLAY_VER(i915) >= 12)
>  #define HAS_OVERLAY(i915)              (DISPLAY_INFO(i915)->has_overlay)
>  #define HAS_PSR(i915)                  (DISPLAY_INFO(i915)->has_psr)
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c
> b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 3b0e87edbacf..83e2cbbfcaf0 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -2496,6 +2496,7 @@ static u8 intel_dbuf_enabled_slices(const struct intel_dbuf_state
> *dbuf_state)
>  static int
>  skl_compute_ddb(struct intel_atomic_state *state)
>  {
> +       struct intel_display *display = to_intel_display(state);
>         struct drm_i915_private *i915 = to_i915(state->base.dev);
>         const struct intel_dbuf_state *old_dbuf_state;
>         struct intel_dbuf_state *new_dbuf_state = NULL;
> @@ -2524,7 +2525,7 @@ skl_compute_ddb(struct intel_atomic_state *state)
>                         return ret;
>         }
>  
> -       if (HAS_MBUS_JOINING(i915)) {
> +       if (HAS_MBUS_JOINING(display)) {
>                 new_dbuf_state->joined_mbus =
>                         adlp_check_mbus_joined(new_dbuf_state->active_pipes);
>  
> @@ -2984,7 +2985,7 @@ static void skl_wm_get_hw_state(struct drm_i915_private *i915)
>                 to_intel_dbuf_state(i915->display.dbuf.obj.state);
>         struct intel_crtc *crtc;
>  
> -       if (HAS_MBUS_JOINING(i915))
> +       if (HAS_MBUS_JOINING(display))
>                 dbuf_state->joined_mbus = intel_de_read(i915, MBUS_CTL) & MBUS_JOIN;
>  
>         dbuf_state->mdclk_cdclk_ratio = intel_mdclk_cdclk_ratio(display, &display->cdclk.hw);
> @@ -3562,23 +3563,24 @@ int intel_dbuf_state_set_mdclk_cdclk_ratio(struct intel_atomic_state
> *state,
>  void intel_dbuf_mdclk_cdclk_ratio_update(struct drm_i915_private *i915,
>                                          int ratio, bool joined_mbus)
>  {
> +       struct intel_display *display = &i915->display;
>         enum dbuf_slice slice;
>  
> -       if (!HAS_MBUS_JOINING(i915))
> +       if (!HAS_MBUS_JOINING(display))
>                 return;
>  
> -       if (DISPLAY_VER(i915) >= 20)
> -               intel_de_rmw(i915, MBUS_CTL, MBUS_TRANSLATION_THROTTLE_MIN_MASK,
> +       if (DISPLAY_VER(display) >= 20)
> +               intel_de_rmw(display, MBUS_CTL, MBUS_TRANSLATION_THROTTLE_MIN_MASK,
>                              MBUS_TRANSLATION_THROTTLE_MIN(ratio - 1));
>  
>         if (joined_mbus)
>                 ratio *= 2;
>  
> -       drm_dbg_kms(&i915->drm, "Updating dbuf ratio to %d (mbus joined: %s)\n",
> +       drm_dbg_kms(display->drm, "Updating dbuf ratio to %d (mbus joined: %s)\n",
>                     ratio, str_yes_no(joined_mbus));
>  
> -       for_each_dbuf_slice(i915, slice)
> -               intel_de_rmw(i915, DBUF_CTL_S(slice),
> +       for_each_dbuf_slice(display, slice)
> +               intel_de_rmw(display, DBUF_CTL_S(slice),
>                              DBUF_MIN_TRACKER_STATE_SERVICE_MASK,
>                              DBUF_MIN_TRACKER_STATE_SERVICE(ratio - 1));
>  }
Rodrigo Vivi Nov. 6, 2024, 5:04 p.m. UTC | #2
On Mon, Nov 04, 2024 at 07:19:22PM +0200, Jani Nikula wrote:
> Convert HAS_MBUS_JOINING() to struct intel_display. Do minimal drive-by
> conversions to struct intel_display in the callers while at it.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  .../drm/i915/display/intel_display_device.h    |  2 +-
>  drivers/gpu/drm/i915/display/skl_watermark.c   | 18 ++++++++++--------
>  2 files changed, 11 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
> index b85b1d3ff708..a0fed40b7779 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -167,7 +167,7 @@ struct intel_display_platforms {
>  #define HAS_IPS(__display)		((__display)->platform.haswell_ult || (__display)->platform.broadwell)
>  #define HAS_LRR(i915)			(DISPLAY_VER(i915) >= 12)
>  #define HAS_LSPCON(i915)		(IS_DISPLAY_VER(i915, 9, 10))
> -#define HAS_MBUS_JOINING(i915)		(IS_ALDERLAKE_P(i915) || DISPLAY_VER(i915) >= 14)
> +#define HAS_MBUS_JOINING(__display)	((__display)->platform.alderlake_p || DISPLAY_VER(__display) >= 14)
>  #define HAS_MSO(i915)			(DISPLAY_VER(i915) >= 12)
>  #define HAS_OVERLAY(i915)		(DISPLAY_INFO(i915)->has_overlay)
>  #define HAS_PSR(i915)			(DISPLAY_INFO(i915)->has_psr)
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 3b0e87edbacf..83e2cbbfcaf0 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -2496,6 +2496,7 @@ static u8 intel_dbuf_enabled_slices(const struct intel_dbuf_state *dbuf_state)
>  static int
>  skl_compute_ddb(struct intel_atomic_state *state)
>  {
> +	struct intel_display *display = to_intel_display(state);
>  	struct drm_i915_private *i915 = to_i915(state->base.dev);
>  	const struct intel_dbuf_state *old_dbuf_state;
>  	struct intel_dbuf_state *new_dbuf_state = NULL;
> @@ -2524,7 +2525,7 @@ skl_compute_ddb(struct intel_atomic_state *state)
>  			return ret;
>  	}
>  
> -	if (HAS_MBUS_JOINING(i915)) {
> +	if (HAS_MBUS_JOINING(display)) {
>  		new_dbuf_state->joined_mbus =
>  			adlp_check_mbus_joined(new_dbuf_state->active_pipes);
>  
> @@ -2984,7 +2985,7 @@ static void skl_wm_get_hw_state(struct drm_i915_private *i915)
>  		to_intel_dbuf_state(i915->display.dbuf.obj.state);
>  	struct intel_crtc *crtc;
>  
> -	if (HAS_MBUS_JOINING(i915))
> +	if (HAS_MBUS_JOINING(display))
>  		dbuf_state->joined_mbus = intel_de_read(i915, MBUS_CTL) & MBUS_JOIN;
>  
>  	dbuf_state->mdclk_cdclk_ratio = intel_mdclk_cdclk_ratio(display, &display->cdclk.hw);
> @@ -3562,23 +3563,24 @@ int intel_dbuf_state_set_mdclk_cdclk_ratio(struct intel_atomic_state *state,
>  void intel_dbuf_mdclk_cdclk_ratio_update(struct drm_i915_private *i915,
>  					 int ratio, bool joined_mbus)
>  {
> +	struct intel_display *display = &i915->display;
>  	enum dbuf_slice slice;
>  
> -	if (!HAS_MBUS_JOINING(i915))
> +	if (!HAS_MBUS_JOINING(display))
>  		return;
>  
> -	if (DISPLAY_VER(i915) >= 20)
> -		intel_de_rmw(i915, MBUS_CTL, MBUS_TRANSLATION_THROTTLE_MIN_MASK,
> +	if (DISPLAY_VER(display) >= 20)
> +		intel_de_rmw(display, MBUS_CTL, MBUS_TRANSLATION_THROTTLE_MIN_MASK,
>  			     MBUS_TRANSLATION_THROTTLE_MIN(ratio - 1));
>  
>  	if (joined_mbus)
>  		ratio *= 2;
>  
> -	drm_dbg_kms(&i915->drm, "Updating dbuf ratio to %d (mbus joined: %s)\n",
> +	drm_dbg_kms(display->drm, "Updating dbuf ratio to %d (mbus joined: %s)\n",
>  		    ratio, str_yes_no(joined_mbus));
>  
> -	for_each_dbuf_slice(i915, slice)
> -		intel_de_rmw(i915, DBUF_CTL_S(slice),
> +	for_each_dbuf_slice(display, slice)
> +		intel_de_rmw(display, DBUF_CTL_S(slice),
>  			     DBUF_MIN_TRACKER_STATE_SERVICE_MASK,
>  			     DBUF_MIN_TRACKER_STATE_SERVICE(ratio - 1));
>  }
> -- 
> 2.39.5
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index b85b1d3ff708..a0fed40b7779 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -167,7 +167,7 @@  struct intel_display_platforms {
 #define HAS_IPS(__display)		((__display)->platform.haswell_ult || (__display)->platform.broadwell)
 #define HAS_LRR(i915)			(DISPLAY_VER(i915) >= 12)
 #define HAS_LSPCON(i915)		(IS_DISPLAY_VER(i915, 9, 10))
-#define HAS_MBUS_JOINING(i915)		(IS_ALDERLAKE_P(i915) || DISPLAY_VER(i915) >= 14)
+#define HAS_MBUS_JOINING(__display)	((__display)->platform.alderlake_p || DISPLAY_VER(__display) >= 14)
 #define HAS_MSO(i915)			(DISPLAY_VER(i915) >= 12)
 #define HAS_OVERLAY(i915)		(DISPLAY_INFO(i915)->has_overlay)
 #define HAS_PSR(i915)			(DISPLAY_INFO(i915)->has_psr)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 3b0e87edbacf..83e2cbbfcaf0 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -2496,6 +2496,7 @@  static u8 intel_dbuf_enabled_slices(const struct intel_dbuf_state *dbuf_state)
 static int
 skl_compute_ddb(struct intel_atomic_state *state)
 {
+	struct intel_display *display = to_intel_display(state);
 	struct drm_i915_private *i915 = to_i915(state->base.dev);
 	const struct intel_dbuf_state *old_dbuf_state;
 	struct intel_dbuf_state *new_dbuf_state = NULL;
@@ -2524,7 +2525,7 @@  skl_compute_ddb(struct intel_atomic_state *state)
 			return ret;
 	}
 
-	if (HAS_MBUS_JOINING(i915)) {
+	if (HAS_MBUS_JOINING(display)) {
 		new_dbuf_state->joined_mbus =
 			adlp_check_mbus_joined(new_dbuf_state->active_pipes);
 
@@ -2984,7 +2985,7 @@  static void skl_wm_get_hw_state(struct drm_i915_private *i915)
 		to_intel_dbuf_state(i915->display.dbuf.obj.state);
 	struct intel_crtc *crtc;
 
-	if (HAS_MBUS_JOINING(i915))
+	if (HAS_MBUS_JOINING(display))
 		dbuf_state->joined_mbus = intel_de_read(i915, MBUS_CTL) & MBUS_JOIN;
 
 	dbuf_state->mdclk_cdclk_ratio = intel_mdclk_cdclk_ratio(display, &display->cdclk.hw);
@@ -3562,23 +3563,24 @@  int intel_dbuf_state_set_mdclk_cdclk_ratio(struct intel_atomic_state *state,
 void intel_dbuf_mdclk_cdclk_ratio_update(struct drm_i915_private *i915,
 					 int ratio, bool joined_mbus)
 {
+	struct intel_display *display = &i915->display;
 	enum dbuf_slice slice;
 
-	if (!HAS_MBUS_JOINING(i915))
+	if (!HAS_MBUS_JOINING(display))
 		return;
 
-	if (DISPLAY_VER(i915) >= 20)
-		intel_de_rmw(i915, MBUS_CTL, MBUS_TRANSLATION_THROTTLE_MIN_MASK,
+	if (DISPLAY_VER(display) >= 20)
+		intel_de_rmw(display, MBUS_CTL, MBUS_TRANSLATION_THROTTLE_MIN_MASK,
 			     MBUS_TRANSLATION_THROTTLE_MIN(ratio - 1));
 
 	if (joined_mbus)
 		ratio *= 2;
 
-	drm_dbg_kms(&i915->drm, "Updating dbuf ratio to %d (mbus joined: %s)\n",
+	drm_dbg_kms(display->drm, "Updating dbuf ratio to %d (mbus joined: %s)\n",
 		    ratio, str_yes_no(joined_mbus));
 
-	for_each_dbuf_slice(i915, slice)
-		intel_de_rmw(i915, DBUF_CTL_S(slice),
+	for_each_dbuf_slice(display, slice)
+		intel_de_rmw(display, DBUF_CTL_S(slice),
 			     DBUF_MIN_TRACKER_STATE_SERVICE_MASK,
 			     DBUF_MIN_TRACKER_STATE_SERVICE(ratio - 1));
 }