diff mbox series

[4/5] drm/i915/vbt: define a few more DSI dphy config bits

Message ID 758f56bbf5677770a128d3390fbd9cfd526d7e7a.1733409899.git.jani.nikula@intel.com (mailing list archive)
State New
Headers show
Series drm/i915/dsi: add some missing dphy configuration | expand

Commit Message

Jani Nikula Dec. 5, 2024, 2:45 p.m. UTC 
We're missing Blanking Packets During BLLP and LP Clock During LPM. Add
them.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_bios.h b/drivers/gpu/drm/i915/display/intel_bios.h
index f9841f0498c6..a8ef7f9a5503 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.h
+++ b/drivers/gpu/drm/i915/display/intel_bios.h
@@ -157,7 +157,9 @@  struct mipi_config {
 	u16 dphy_param_valid:1;
 	u16 eot_pkt_disabled:1;
 	u16 enable_clk_stop:1;
-	u16 rsvd7:13;
+	u16 blanking_packets_during_bllp:1;			/* 219+ */
+	u16 lp_clock_during_lpm:1;				/* 219+ */
+	u16 rsvd7:11;
 
 	u32 hs_tx_timeout;
 	u32 lp_rx_timeout;