| Message ID | 8103a31fbf6da725e6aed3bb86c15bbd581164fb.1717514638.git.jani.nikula@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: finish the job of removing implicit dev_priv | expand |
On Tue, Jun 04, 2024 at 06:25:28PM +0300, Jani Nikula wrote: > Avoid the implicit dev_priv local variable use, and pass dev_priv > explicitly to the TRANS_VSYNCSHIFT register macro. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/icl_dsi.c | 3 ++- > drivers/gpu/drm/i915/display/intel_display.c | 3 ++- > drivers/gpu/drm/i915/display/intel_pch_display.c | 2 +- > drivers/gpu/drm/i915/i915_reg.h | 2 +- > drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 8 ++++---- > 5 files changed, 10 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c > index b267099fde8a..0625c4d5ee0b 100644 > --- a/drivers/gpu/drm/i915/display/icl_dsi.c > +++ b/drivers/gpu/drm/i915/display/icl_dsi.c > @@ -982,7 +982,8 @@ gen11_dsi_set_transcoder_timings(struct intel_encoder *encoder, > if (is_vid_mode(intel_dsi)) { > for_each_dsi_port(port, intel_dsi->ports) { > dsi_trans = dsi_port_to_transcoder(port); > - intel_de_write(dev_priv, TRANS_VSYNCSHIFT(dsi_trans), > + intel_de_write(dev_priv, > + TRANS_VSYNCSHIFT(dev_priv, dsi_trans), > vsync_shift); > } > } > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index 49f7ac0f7997..993eb0935f6b 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -2707,7 +2707,8 @@ static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_sta > } > > if (DISPLAY_VER(dev_priv) >= 4) > - intel_de_write(dev_priv, TRANS_VSYNCSHIFT(cpu_transcoder), > + intel_de_write(dev_priv, > + TRANS_VSYNCSHIFT(dev_priv, cpu_transcoder), > vsyncshift); > > intel_de_write(dev_priv, TRANS_HTOTAL(dev_priv, cpu_transcoder), > diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c b/drivers/gpu/drm/i915/display/intel_pch_display.c > index 9f8269705171..6a45bc1651c3 100644 > --- a/drivers/gpu/drm/i915/display/intel_pch_display.c > +++ b/drivers/gpu/drm/i915/display/intel_pch_display.c > @@ -237,7 +237,7 @@ static void ilk_pch_transcoder_set_timings(const struct intel_crtc_state *crtc_s > intel_de_write(dev_priv, PCH_TRANS_VSYNC(pch_transcoder), > intel_de_read(dev_priv, TRANS_VSYNC(dev_priv, cpu_transcoder))); > intel_de_write(dev_priv, PCH_TRANS_VSYNCSHIFT(pch_transcoder), > - intel_de_read(dev_priv, TRANS_VSYNCSHIFT(cpu_transcoder))); > + intel_de_read(dev_priv, TRANS_VSYNCSHIFT(dev_priv, cpu_transcoder))); > } > > static void ilk_enable_pch_transcoder(const struct intel_crtc_state *crtc_state) > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 92d9e8cdf782..d961f3f70aaa 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -1224,7 +1224,7 @@ > #define TRANS_VBLANK(dev_priv, trans) _MMIO_TRANS2(dev_priv, (trans), _TRANS_VBLANK_A) > #define TRANS_VSYNC(dev_priv, trans) _MMIO_TRANS2(dev_priv, (trans), _TRANS_VSYNC_A) > #define BCLRPAT(dev_priv, trans) _MMIO_TRANS2(dev_priv, (trans), _BCLRPAT_A) > -#define TRANS_VSYNCSHIFT(trans) _MMIO_TRANS2(dev_priv, (trans), _TRANS_VSYNCSHIFT_A) > +#define TRANS_VSYNCSHIFT(dev_priv, trans) _MMIO_TRANS2(dev_priv, (trans), _TRANS_VSYNCSHIFT_A) > #define PIPESRC(pipe) _MMIO_TRANS2(dev_priv, (pipe), _PIPEASRC) > #define TRANS_MULT(trans) _MMIO_TRANS2(dev_priv, (trans), _TRANS_MULT_A) > > diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c > index 5e1ef52922cc..5abae7df0bfe 100644 > --- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c > +++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c > @@ -238,7 +238,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) > MMIO_D(TRANS_VBLANK(dev_priv, TRANSCODER_A)); > MMIO_D(TRANS_VSYNC(dev_priv, TRANSCODER_A)); > MMIO_D(BCLRPAT(dev_priv, TRANSCODER_A)); > - MMIO_D(TRANS_VSYNCSHIFT(TRANSCODER_A)); > + MMIO_D(TRANS_VSYNCSHIFT(dev_priv, TRANSCODER_A)); > MMIO_D(PIPESRC(TRANSCODER_A)); > MMIO_D(TRANS_HTOTAL(dev_priv, TRANSCODER_B)); > MMIO_D(TRANS_HBLANK(dev_priv, TRANSCODER_B)); > @@ -247,7 +247,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) > MMIO_D(TRANS_VBLANK(dev_priv, TRANSCODER_B)); > MMIO_D(TRANS_VSYNC(dev_priv, TRANSCODER_B)); > MMIO_D(BCLRPAT(dev_priv, TRANSCODER_B)); > - MMIO_D(TRANS_VSYNCSHIFT(TRANSCODER_B)); > + MMIO_D(TRANS_VSYNCSHIFT(dev_priv, TRANSCODER_B)); > MMIO_D(PIPESRC(TRANSCODER_B)); > MMIO_D(TRANS_HTOTAL(dev_priv, TRANSCODER_C)); > MMIO_D(TRANS_HBLANK(dev_priv, TRANSCODER_C)); > @@ -256,7 +256,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) > MMIO_D(TRANS_VBLANK(dev_priv, TRANSCODER_C)); > MMIO_D(TRANS_VSYNC(dev_priv, TRANSCODER_C)); > MMIO_D(BCLRPAT(dev_priv, TRANSCODER_C)); > - MMIO_D(TRANS_VSYNCSHIFT(TRANSCODER_C)); > + MMIO_D(TRANS_VSYNCSHIFT(dev_priv, TRANSCODER_C)); > MMIO_D(PIPESRC(TRANSCODER_C)); > MMIO_D(TRANS_HTOTAL(dev_priv, TRANSCODER_EDP)); > MMIO_D(TRANS_HBLANK(dev_priv, TRANSCODER_EDP)); > @@ -265,7 +265,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) > MMIO_D(TRANS_VBLANK(dev_priv, TRANSCODER_EDP)); > MMIO_D(TRANS_VSYNC(dev_priv, TRANSCODER_EDP)); > MMIO_D(BCLRPAT(dev_priv, TRANSCODER_EDP)); > - MMIO_D(TRANS_VSYNCSHIFT(TRANSCODER_EDP)); > + MMIO_D(TRANS_VSYNCSHIFT(dev_priv, TRANSCODER_EDP)); > MMIO_D(PIPE_DATA_M1(TRANSCODER_A)); > MMIO_D(PIPE_DATA_N1(TRANSCODER_A)); > MMIO_D(PIPE_DATA_M2(TRANSCODER_A)); > -- > 2.39.2 >
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index b267099fde8a..0625c4d5ee0b 100644 --- a/drivers/gpu/drm/i915/display/icl_dsi.c +++ b/drivers/gpu/drm/i915/display/icl_dsi.c @@ -982,7 +982,8 @@ gen11_dsi_set_transcoder_timings(struct intel_encoder *encoder, if (is_vid_mode(intel_dsi)) { for_each_dsi_port(port, intel_dsi->ports) { dsi_trans = dsi_port_to_transcoder(port); - intel_de_write(dev_priv, TRANS_VSYNCSHIFT(dsi_trans), + intel_de_write(dev_priv, + TRANS_VSYNCSHIFT(dev_priv, dsi_trans), vsync_shift); } } diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 49f7ac0f7997..993eb0935f6b 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -2707,7 +2707,8 @@ static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_sta } if (DISPLAY_VER(dev_priv) >= 4) - intel_de_write(dev_priv, TRANS_VSYNCSHIFT(cpu_transcoder), + intel_de_write(dev_priv, + TRANS_VSYNCSHIFT(dev_priv, cpu_transcoder), vsyncshift); intel_de_write(dev_priv, TRANS_HTOTAL(dev_priv, cpu_transcoder), diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c b/drivers/gpu/drm/i915/display/intel_pch_display.c index 9f8269705171..6a45bc1651c3 100644 --- a/drivers/gpu/drm/i915/display/intel_pch_display.c +++ b/drivers/gpu/drm/i915/display/intel_pch_display.c @@ -237,7 +237,7 @@ static void ilk_pch_transcoder_set_timings(const struct intel_crtc_state *crtc_s intel_de_write(dev_priv, PCH_TRANS_VSYNC(pch_transcoder), intel_de_read(dev_priv, TRANS_VSYNC(dev_priv, cpu_transcoder))); intel_de_write(dev_priv, PCH_TRANS_VSYNCSHIFT(pch_transcoder), - intel_de_read(dev_priv, TRANS_VSYNCSHIFT(cpu_transcoder))); + intel_de_read(dev_priv, TRANS_VSYNCSHIFT(dev_priv, cpu_transcoder))); } static void ilk_enable_pch_transcoder(const struct intel_crtc_state *crtc_state) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 92d9e8cdf782..d961f3f70aaa 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1224,7 +1224,7 @@ #define TRANS_VBLANK(dev_priv, trans) _MMIO_TRANS2(dev_priv, (trans), _TRANS_VBLANK_A) #define TRANS_VSYNC(dev_priv, trans) _MMIO_TRANS2(dev_priv, (trans), _TRANS_VSYNC_A) #define BCLRPAT(dev_priv, trans) _MMIO_TRANS2(dev_priv, (trans), _BCLRPAT_A) -#define TRANS_VSYNCSHIFT(trans) _MMIO_TRANS2(dev_priv, (trans), _TRANS_VSYNCSHIFT_A) +#define TRANS_VSYNCSHIFT(dev_priv, trans) _MMIO_TRANS2(dev_priv, (trans), _TRANS_VSYNCSHIFT_A) #define PIPESRC(pipe) _MMIO_TRANS2(dev_priv, (pipe), _PIPEASRC) #define TRANS_MULT(trans) _MMIO_TRANS2(dev_priv, (trans), _TRANS_MULT_A) diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c index 5e1ef52922cc..5abae7df0bfe 100644 --- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c +++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c @@ -238,7 +238,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(TRANS_VBLANK(dev_priv, TRANSCODER_A)); MMIO_D(TRANS_VSYNC(dev_priv, TRANSCODER_A)); MMIO_D(BCLRPAT(dev_priv, TRANSCODER_A)); - MMIO_D(TRANS_VSYNCSHIFT(TRANSCODER_A)); + MMIO_D(TRANS_VSYNCSHIFT(dev_priv, TRANSCODER_A)); MMIO_D(PIPESRC(TRANSCODER_A)); MMIO_D(TRANS_HTOTAL(dev_priv, TRANSCODER_B)); MMIO_D(TRANS_HBLANK(dev_priv, TRANSCODER_B)); @@ -247,7 +247,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(TRANS_VBLANK(dev_priv, TRANSCODER_B)); MMIO_D(TRANS_VSYNC(dev_priv, TRANSCODER_B)); MMIO_D(BCLRPAT(dev_priv, TRANSCODER_B)); - MMIO_D(TRANS_VSYNCSHIFT(TRANSCODER_B)); + MMIO_D(TRANS_VSYNCSHIFT(dev_priv, TRANSCODER_B)); MMIO_D(PIPESRC(TRANSCODER_B)); MMIO_D(TRANS_HTOTAL(dev_priv, TRANSCODER_C)); MMIO_D(TRANS_HBLANK(dev_priv, TRANSCODER_C)); @@ -256,7 +256,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(TRANS_VBLANK(dev_priv, TRANSCODER_C)); MMIO_D(TRANS_VSYNC(dev_priv, TRANSCODER_C)); MMIO_D(BCLRPAT(dev_priv, TRANSCODER_C)); - MMIO_D(TRANS_VSYNCSHIFT(TRANSCODER_C)); + MMIO_D(TRANS_VSYNCSHIFT(dev_priv, TRANSCODER_C)); MMIO_D(PIPESRC(TRANSCODER_C)); MMIO_D(TRANS_HTOTAL(dev_priv, TRANSCODER_EDP)); MMIO_D(TRANS_HBLANK(dev_priv, TRANSCODER_EDP)); @@ -265,7 +265,7 @@ static int iterate_generic_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(TRANS_VBLANK(dev_priv, TRANSCODER_EDP)); MMIO_D(TRANS_VSYNC(dev_priv, TRANSCODER_EDP)); MMIO_D(BCLRPAT(dev_priv, TRANSCODER_EDP)); - MMIO_D(TRANS_VSYNCSHIFT(TRANSCODER_EDP)); + MMIO_D(TRANS_VSYNCSHIFT(dev_priv, TRANSCODER_EDP)); MMIO_D(PIPE_DATA_M1(TRANSCODER_A)); MMIO_D(PIPE_DATA_N1(TRANSCODER_A)); MMIO_D(PIPE_DATA_M2(TRANSCODER_A));
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the TRANS_VSYNCSHIFT register macro. Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/display/icl_dsi.c | 3 ++- drivers/gpu/drm/i915/display/intel_display.c | 3 ++- drivers/gpu/drm/i915/display/intel_pch_display.c | 2 +- drivers/gpu/drm/i915/i915_reg.h | 2 +- drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 8 ++++---- 5 files changed, 10 insertions(+), 8 deletions(-)