From patchwork Thu Aug 29 11:58:23 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 2851276 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 288BFBF546 for ; Thu, 29 Aug 2013 12:05:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 73E0E201FE for ; Thu, 29 Aug 2013 12:05:13 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id F039F201D5 for ; Thu, 29 Aug 2013 12:05:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1DAFCE7466 for ; Thu, 29 Aug 2013 05:05:11 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [143.182.124.21]) by gabe.freedesktop.org (Postfix) with ESMTP id 3721EE5BFD for ; Thu, 29 Aug 2013 05:01:02 -0700 (PDT) Received: from azsmga001.ch.intel.com ([10.2.17.19]) by azsmga101.ch.intel.com with ESMTP; 29 Aug 2013 05:01:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.89,983,1367996400"; d="scan'208";a="353292346" Received: from unknown (HELO localhost) ([10.252.123.20]) by azsmga001.ch.intel.com with ESMTP; 29 Aug 2013 05:00:53 -0700 From: Jani Nikula To: Takashi Iwai , intel-gfx@lists.freedesktop.org In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: User-Agent: Notmuch/0.16+11~ga002d1a (http://notmuchmail.org) Emacs/24.3.1 (x86_64-pc-linux-gnu) Date: Thu, 29 Aug 2013 14:58:23 +0300 Message-ID: <87txi8d7z4.fsf@intel.com> MIME-Version: 1.0 Subject: Re: [Intel-gfx] How to work around zero-initialized BLC_PWM_PCH_CTL2? X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org X-Spam-Status: No, score=-6.7 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi Takashi - On Thu, 29 Aug 2013, Takashi Iwai wrote: > a new laptop model we've been struggling has some strange hardware > configuration. BIOS turns off backlight and skips its initialization > when the machine is booted with the lid closed. This leaves > BLC_PWM_PCH_CTL2 and other registers uninitialized. Because a proper > max brightness value can't be obtained from this register, i915 driver > doesn't create the own backlight control any more. It results in the > permanent blank screen even after the lid is opened. > > Actually, the only missing piece is the initial BLC_PWM_PCH_CTL2 > value. If I overwrite it via intel_reg_write before loading i915 > module, everything works fine. > > Now I wonder whether we can get this max brightness value from > somewhere else. Is it defined in VBT or anywhere else persistent? Please run tools/intel_bios_reader from intel-gpu-tools, and post the results. If that fails, please attach hexdump of /sys/kernel/debug/dri/0/i915_opregion. The PWM value should be in the VBT, and we could use that as a fallback. If the value makes sense, that is. Additionally we could enable the PWM request from ASLE. It would be interesting to see if there are PWM requests, and with what values, if you enable drm.debug=0xe and do: Adding support for this is a bit tedious, though, as the PWM value has been set as the max for the backlight device. It's probably not a good idea to change the max on the fly in the user space facing interface, so scaling would be required. Note to self, we need to take machines like [1] into account too. BR, Jani. [1] http://lkml.kernel.org/r/1347627426-3813-1-git-send-email-grant.likely@secretlab.ca diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c index 53a82ea..2b379ec 100644 --- a/drivers/gpu/drm/i915/intel_opregion.c +++ b/drivers/gpu/drm/i915/intel_opregion.c @@ -390,6 +390,7 @@ static u32 asle_set_als_illum(struct drm_device *dev, u32 alsi) static u32 asle_set_pwm_freq(struct drm_device *dev, u32 pfmb) { + DRM_DEBUG_DRIVER("pfmb = 0x%08x\n", pfmb); DRM_DEBUG_DRIVER("PWM freq is not supported\n"); return ASLE_PWM_FREQ_FAILED; } @@ -618,7 +619,8 @@ void intel_opregion_init(struct drm_device *dev) } if (opregion->asle) { - iowrite32(ASLE_TCHE_BLC_EN, &opregion->asle->tche); + iowrite32(ASLE_TCHE_BLC_EN | ASLE_TCHE_PFMB_EN, + &opregion->asle->tche); iowrite32(ASLE_ARDY_READY, &opregion->asle->ardy); } }