@@ -2974,6 +2974,8 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate, {
struct intel_plane_state *intel_pstate = to_intel_plane_state(pstate);
struct drm_framebuffer *fb = pstate->fb;
+ struct intel_plane *intel_plane = to_intel_plane(pstate->plane);
+ uint32_t down_scale_amount, data_rate;
uint32_t width = 0, height = 0;
width = drm_rect_width(&intel_pstate->src) >> 16; @@ -2985,15 +2987,20 @@ skl_plane_relative_data_rate(const struct intel_crtc_state *cstate,
/* for planar format */
This commit introduced a divide-by-zero crash on plugging in an external display to the system. Below is the crash. [ 122.320882] divide error: 0000 [#1] PREEMPT SMP [ 122.320893] Modules linked in: rfcomm i2c_dev uinput snd_soc_hdac_hdmi snd_soc_dmic aesni_intel aes_x86_64 glue_helper lrw gf128mul ablk_helper cryptd btusb uvcvideo snd_soc_skl snd_soc_skl_ipc snd_hda_ext_core videobuf2_vmalloc snd_hda_core btrtl videobuf2_memops btbcm videobuf2_v4l2 btintel videobuf2_core bluetooth snd_soc_ssm456 7 fuse cfg80211 nf_conntrack_ipv6 nf_defrag_ipv6 ip6table_filter ip6_tables r8152 mii joydev snd_seq_midi snd_seq_midi_event snd_rawmidi snd_seq snd_seq_device ppp_asyn c ppp_generic slhc tun [ 122.321004] CPU: 3 PID: 9307 Comm: DrmThread Tainted: G U 4.6.0-rc3-00039-g11f59d6 #420 [ 122.321008] Hardware name: xxxxxxxxxxxxx, BIOS xxxxx.7820.64.0 03/17/2016 [ 122.321011] task: ffff880071c58e40 ti: ffff880272afc000 task.ti: ffff880272afc000 [ 122.321014] RIP: 0010:[<ffffffffac93c3b8>] [<ffffffffac93c3b8>] skl_update_pipe_wm+0x384/0x814 [ 122.321022] RSP: 0018:ffff880272affa18 EFLAGS: 00010202 [ 122.321025] RAX: 0000000000000000 RBX: ffff8802750a01be RCX: 0000000000010000 [ 122.321028] RDX: 0000000000000000 RSI: 0000000000000004 RDI: 00000000750a01c6 [ 122.321031] RBP: ffff880272affad0 R08: ffff88026c6f7780 R09: ffff8802750a5000 [ 122.321033] R10: ffff880274aea800 R11: 00000000000005a0 R12: ffff880274aea7fc [ 122.321036] R13: 0000000000000000 R14: ffff880274add000 R15: ffff880269571000 [ 122.321039] FS: 00007f8b04a30700(0000) GS:ffff88027ed80000(0000) knlGS:0000000000000000 [ 122.321042] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 122.321045] CR2: 00007f97a0f33000 CR3: 0000000075b08000 CR4: 00000000003406e0 [ 122.321047] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 [ 122.321050] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 [ 122.321053] Stack: [ 122.321056] ffff880274a81598 0000000000000001 ffff880272affa80 ffffffffac9b6973 [ 122.321066] ffff8802750a5000 ffff8802750a5000 ffff88026c6f7780 ffff88026c6f7780 [ 122.321077] ffff8802750a34e8 0000000000000004 0000000000000000 00000000000001ae [ 122.321087] Call Trace: [ 122.321092] [<ffffffffac9b6973>] ? intel_dp_aux_transfer+0x169/0x1d8 [ 122.321096] [<ffffffffac93cbbe>] skl_update_wm+0xf8/0x652 [ 122.321108] [<ffffffffac9790eb>] ? gen9_write32+0x1ba/0x1cc [ 122.321112] [<ffffffffac93debc>] intel_update_watermarks+0x1e/0x20 [ 122.321119] [<ffffffffac994f98>] haswell_crtc_enable+0x359/0x786 [ 122.321123] [<ffffffffac9984b1>] intel_atomic_commit+0x85e/0xff3 [ 122.321127] [<ffffffffac925f75>] ? drm_atomic_check_only+0x3f0/0x55c [ 122.321130] [<ffffffffac92612e>] drm_atomic_commit+0x4d/0x52 [ 122.321135] [<ffffffffac907e06>] drm_atomic_helper_set_config+0x53/0x9e [ 122.321138] [<ffffffffac9183f1>] drm_mode_set_config_internal+0x5e/0xf8 [ 122.321142] [<ffffffffac91c4b1>] drm_mode_setcrtc+0x3e3/0x465 [ 122.321145] [<ffffffffac90f60d>] drm_ioctl+0x274/0x3ce [ 122.321149] [<ffffffffac91c0ce>] ? drm_mode_setplane+0x158/0x158 [ 122.321153] [<ffffffffac6bf6b6>] ? seccomp_phase1+0xf2/0x1ca [ 122.321170] [<ffffffffac714b8f>] ? remove_vma+0x60/0x68 [ 122.321179] [<ffffffffac73dde6>] vfs_ioctl+0x18/0x34 [ 122.321187] [<ffffffffac73e362>] do_vfs_ioctl+0x4a2/0x4c5 [ 122.321199] [<ffffffffac746c18>] ? __fget+0x77/0x83 [ 122.321203] [<ffffffffac73e3dc>] SyS_ioctl+0x57/0x79 [ 122.321207] [<ffffffffac6017a0>] do_syscall_64+0x4c/0x5b [ 122.321212] [<ffffffffacc735fc>] entry_SYSCALL64_slow_path+0x25/0x25 [ 122.321215] Code: f6 4c 89 c7 e8 28 d0 ff ff 89 c0 31 d2 89 df 48 0f af 45 a0 66 42 03 7c 6d c0 48 8b 75 a8 4c 8b 45 80 4c 01 ee 66 41 89 5c b4 0c <48> f7 75 98 8d 1c 07 66 41 89 5c b4 0e 49 8b 40 10 81 b8 8c 00 [ 122.321481] RIP [<ffffffffac93c3b8>] skl_update_pipe_wm+0x384/0x814 [ 122.321488] RSP <ffff880272affa18> [ 122.321491] ---[ end trace a66fed013d3c5bdf ]--- [ 122.321978] Kernel panic - not syncing: Fatal exception [ 122.321999] Kernel Offset: 0x2b600000 from 0xffffffff81000000 (relocation range: 0xffffffff80000000-0xffffffffbfffffff) [ 122.324445] ACPI MEMORY or I/O RESET_REG. Thanks, RK -----Original Message----- From: Intel-gfx [mailto:intel-gfx-bounces@lists.freedesktop.org] On Behalf Of Matt Roper Sent: Monday, March 07, 2016 5:06 PM To: intel-gfx@lists.freedesktop.org Cc: Kumar, Shobhit Subject: [Intel-gfx] [PATCH 4/8] drm/i915/skl+: Use scaling amount for plane data rate calculation (v3) From: "Kumar, Mahesh" <mahesh1.kumar@intel.com<mailto:mahesh1.kumar@intel.com>> if downscaling is enabled plane data rate increases according to scaling amount. take scaling amount under consideration while calculating plane data rate v2: Address Matt's comments, where data rate was overridden because of missing else. v3 (by Matt): - Add braces to 'else' branch to match kernel coding style - Adjust final calculation now that skl_plane_downscale_amount() returns 16.16 fixed point value instead of a decimal fixed point Cc: matthew.d.roper@intel.com<mailto:matthew.d.roper@intel.com> Signed-off-by: Kumar, Mahesh <mahesh1.kumar@intel.com<mailto:mahesh1.kumar@intel.com>> Reviewed-by(v2): Matt Roper <matthew.d.roper@intel.com<mailto:matthew.d.roper@intel.com>> Signed-off-by: Matt Roper <matthew.d.roper@intel.com<mailto:matthew.d.roper@intel.com>> --- drivers/gpu/drm/i915/intel_pm.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) if (fb->pixel_format == DRM_FORMAT_NV12) { if (y) /* y-plane data rate */ - return width * height * + data_rate = width * height * drm_format_plane_cpp(fb->pixel_format, 0); else /* uv-plane data rate */ - return (width / 2) * (height / 2) * + data_rate = (width / 2) * (height / 2) * drm_format_plane_cpp(fb->pixel_format, 1); + } else { + /* for packed formats */ + data_rate = width * height * + drm_format_plane_cpp(fb->pixel_format, 0); } - /* for packed formats */ - return width * height * drm_format_plane_cpp(fb->pixel_format, 0); + down_scale_amount = skl_plane_downscale_amount(intel_plane); + + return data_rate * down_scale_amount >> 16; } /* -- 2.1.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org<mailto:Intel-gfx@lists.freedesktop.org> https://lists.freedesktop.org/mailman/listinfo/intel-gfx