From patchwork Tue Jan 2 06:58:59 2001 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paulo Zanoni X-Patchwork-Id: 6620771 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 1730B9F52D for ; Tue, 16 Jun 2015 22:17:52 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0309A20815 for ; Tue, 16 Jun 2015 22:17:51 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 0E04320812 for ; Tue, 16 Jun 2015 22:17:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 174AB6E5B9; Tue, 16 Jun 2015 15:17:49 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mail-qc0-f176.google.com (mail-qc0-f176.google.com [209.85.216.176]) by gabe.freedesktop.org (Postfix) with ESMTP id 31A996E5B7 for ; Tue, 16 Jun 2015 15:17:48 -0700 (PDT) Received: by qcwx2 with SMTP id x2so9003046qcw.1 for ; Tue, 16 Jun 2015 15:17:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=XmkFgA0PLG9h3ESAcgAuiv7Kb7fr0PzzGSUzAUhd+DU=; b=LlEadWyUr2gltWUCBMzFYOfPBIJRRGO4qiHI2Bch0uLerpMTbJMRdbzyS3s3Vn9/qt mxoE4OKTKYSKiKq43dy8DQcQHZc+zVRpxCNwRijJyPKoeNxhYzLfBQC0YXHbbUK7kHqw Vtyblqe+CBSh008Mykt+M5838im4LOl6kNKbuRwI9LZfq7ZlHC3nKLbiGWEfj+92YDx4 pXGMlx5HBmGE3arkcJLydq0JM0ghNyZZ2nAmSd1RxjS1+AH4wkqnEglZEHWXXD3lqvu4 8xnuFpjZkFMTJFtKajpEvXfLF6Okj3Xmgs0ZeXWhocqI0YKtC9B4ZV/bVZzokHhYVU25 JKRg== X-Received: by 10.55.23.23 with SMTP id i23mr6406212qkh.23.1434493067796; Tue, 16 Jun 2015 15:17:47 -0700 (PDT) Received: from localhost.localdomain (r130-pw-tresbarras.ibys.com.br. [189.76.1.243]) by mx.google.com with ESMTPSA id 60sm1170554qgy.11.2015.06.16.15.17.46 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 16 Jun 2015 15:17:47 -0700 (PDT) From: Paulo Zanoni To: intel-gfx@lists.freedesktop.org Date: Tue, 2 Jan 2001 04:58:59 -0200 Message-Id: <978418739-1927-4-git-send-email-przanoni@gmail.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <978418739-1927-1-git-send-email-przanoni@gmail.com> References: <978418739-1927-1-git-send-email-przanoni@gmail.com> Cc: Paulo Zanoni Subject: [Intel-gfx] [PATCH 3/3] drm/i915: stop using struct_mutex for FBC X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-1.3 required=5.0 tests=BAYES_00, DATE_IN_PAST_96_XX, DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,FREEMAIL_FROM,RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Paulo Zanoni We now have dev_priv->fbc.lock and it should be enough to protect everything related to FBC. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_debugfs.c | 6 ------ drivers/gpu/drm/i915/intel_display.c | 18 ++---------------- drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_fbc.c | 22 +++++++++++++++++++--- 4 files changed, 22 insertions(+), 25 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index c99be0e..d36aa639 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -1620,13 +1620,9 @@ static int i915_fbc_fc_get(void *data, u64 *val) if (INTEL_INFO(dev)->gen < 7 || !HAS_FBC(dev)) return -ENODEV; - drm_modeset_lock_all(dev); mutex_lock(&dev_priv->fbc.lock); - *val = dev_priv->fbc.false_color; - mutex_unlock(&dev_priv->fbc.lock); - drm_modeset_unlock_all(dev); return 0; } @@ -1640,7 +1636,6 @@ static int i915_fbc_fc_set(void *data, u64 val) if (INTEL_INFO(dev)->gen < 7 || !HAS_FBC(dev)) return -ENODEV; - drm_modeset_lock_all(dev); mutex_lock(&dev_priv->fbc.lock); reg = I915_READ(ILK_DPFC_CONTROL); @@ -1651,7 +1646,6 @@ static int i915_fbc_fc_set(void *data, u64 val) (reg & ~FBC_CTL_FALSE_COLOR)); mutex_unlock(&dev_priv->fbc.lock); - drm_modeset_unlock_all(dev); return 0; } diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 3f48917..cf3a86d 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4682,9 +4682,7 @@ intel_post_enable_primary(struct drm_crtc *crtc) */ hsw_enable_ips(intel_crtc); - mutex_lock(&dev->struct_mutex); intel_fbc_update(dev); - mutex_unlock(&dev->struct_mutex); /* * Gen2 reports pipe underruns whenever all planes are disabled. @@ -4740,10 +4738,7 @@ intel_pre_disable_primary(struct drm_crtc *crtc) if (HAS_GMCH_DISPLAY(dev)) intel_set_memory_cxsr(dev_priv, false); - mutex_lock(&dev->struct_mutex); - if (dev_priv->fbc.crtc == intel_crtc) - intel_fbc_disable(dev); - mutex_unlock(&dev->struct_mutex); + intel_fbc_disable_crtc(intel_crtc); /* * FIXME IPS should be fine as long as one plane is @@ -5045,9 +5040,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc) intel_crtc->active = false; intel_update_watermarks(crtc); - mutex_lock(&dev->struct_mutex); intel_fbc_update(dev); - mutex_unlock(&dev->struct_mutex); } static void haswell_crtc_disable(struct drm_crtc *crtc) @@ -5100,9 +5093,7 @@ static void haswell_crtc_disable(struct drm_crtc *crtc) intel_crtc->active = false; intel_update_watermarks(crtc); - mutex_lock(&dev->struct_mutex); intel_fbc_update(dev); - mutex_unlock(&dev->struct_mutex); if (intel_crtc_to_shared_dpll(intel_crtc)) intel_disable_shared_dpll(intel_crtc); @@ -6199,9 +6190,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc) intel_crtc->active = false; intel_update_watermarks(crtc); - mutex_lock(&dev->struct_mutex); intel_fbc_update(dev); - mutex_unlock(&dev->struct_mutex); } static void intel_crtc_disable_noatomic(struct drm_crtc *crtc) @@ -13786,11 +13775,8 @@ static void intel_finish_crtc_commit(struct drm_crtc *crtc) intel_frontbuffer_flip(dev, intel_crtc->atomic.fb_bits); - if (intel_crtc->atomic.update_fbc) { - mutex_lock(&dev->struct_mutex); + if (intel_crtc->atomic.update_fbc) intel_fbc_update(dev); - mutex_unlock(&dev->struct_mutex); - } if (intel_crtc->atomic.post_enable_primary) intel_post_enable_primary(crtc); diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index bcafefc..ac34041 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1251,6 +1251,7 @@ bool intel_fbc_enabled(struct drm_device *dev); void intel_fbc_update(struct drm_device *dev); void intel_fbc_init(struct drm_i915_private *dev_priv); void intel_fbc_disable(struct drm_device *dev); +void intel_fbc_disable_crtc(struct intel_crtc *crtc); void intel_fbc_invalidate(struct drm_i915_private *dev_priv, unsigned int frontbuffer_bits, enum fb_op_origin origin); diff --git a/drivers/gpu/drm/i915/intel_fbc.c b/drivers/gpu/drm/i915/intel_fbc.c index 31ff88b..ef52847 100644 --- a/drivers/gpu/drm/i915/intel_fbc.c +++ b/drivers/gpu/drm/i915/intel_fbc.c @@ -335,7 +335,6 @@ static void intel_fbc_work_fn(struct work_struct *__work) struct drm_device *dev = work->crtc->dev; struct drm_i915_private *dev_priv = dev->dev_private; - mutex_lock(&dev->struct_mutex); mutex_lock(&dev_priv->fbc.lock); if (work == dev_priv->fbc.fbc_work) { /* Double check that we haven't switched fb without cancelling @@ -352,7 +351,6 @@ static void intel_fbc_work_fn(struct work_struct *__work) dev_priv->fbc.fbc_work = NULL; } mutex_unlock(&dev_priv->fbc.lock); - mutex_unlock(&dev->struct_mutex); kfree(work); } @@ -366,7 +364,7 @@ static void intel_fbc_cancel_work(struct drm_i915_private *dev_priv) DRM_DEBUG_KMS("cancelling pending FBC enable\n"); - /* Synchronisation is provided by struct_mutex and checking of + /* Synchronisation is provided by fbc.lock and checking of * dev_priv->fbc.fbc_work, so we can perform the cancellation * entirely asynchronously. */ @@ -454,6 +452,24 @@ void intel_fbc_disable(struct drm_device *dev) mutex_unlock(&dev_priv->fbc.lock); } +/** + * intel_fbc_disable_crtc - disable FBC for CRTC + * @crtc: the CRTC + * + * This function is called when the CRTC is being disabled. If it is the FBC + * CRTC, then FBC will also be disabled. + */ +void intel_fbc_disable_crtc(struct intel_crtc *crtc) +{ + struct drm_device *dev = crtc->base.dev; + struct drm_i915_private *dev_priv = dev->dev_private; + + mutex_lock(&dev_priv->fbc.lock); + if (dev_priv->fbc.crtc == crtc) + __intel_fbc_disable(dev); + mutex_unlock(&dev_priv->fbc.lock); +} + const char *intel_no_fbc_reason_str(enum no_fbc_reason reason) { switch (reason) {