| Message ID | 9bc5819afa46416eb8f12ac050ed4d3bcde34b63.1714471597.git.jani.nikula@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/psr: implicit dev_priv removal | expand |
On Tue, Apr 30, 2024 at 01:10:05PM +0300, Jani Nikula wrote: > Avoid the implicit dev_priv local variable use, and pass dev_priv > explicitly to the PSR_EVENT register macro. > > Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > --- > drivers/gpu/drm/i915/display/intel_psr.c | 4 +++- > drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +- > 2 files changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c > index 156660ab7adf..2dca9957a06b 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -415,7 +415,9 @@ void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir) > if (DISPLAY_VER(dev_priv) >= 9) { > u32 val; > > - val = intel_de_rmw(dev_priv, PSR_EVENT(cpu_transcoder), 0, 0); > + val = intel_de_rmw(dev_priv, > + PSR_EVENT(dev_priv, cpu_transcoder), > + 0, 0); > > psr_event_print(dev_priv, val, intel_dp->psr.psr2_enabled); > } > diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h > index 785e4f9e7828..817bc372bf35 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h > +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h > @@ -195,7 +195,7 @@ > #define _PSR_EVENT_TRANS_C 0x62848 > #define _PSR_EVENT_TRANS_D 0x63848 > #define _PSR_EVENT_TRANS_EDP 0x6f848 > -#define PSR_EVENT(tran) _MMIO_TRANS2(dev_priv, tran, _PSR_EVENT_TRANS_A) > +#define PSR_EVENT(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PSR_EVENT_TRANS_A) > #define PSR_EVENT_PSR2_WD_TIMER_EXPIRE REG_BIT(17) > #define PSR_EVENT_PSR2_DISABLED REG_BIT(16) > #define PSR_EVENT_SU_DIRTY_FIFO_UNDERRUN REG_BIT(15) > -- > 2.39.2 >
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 156660ab7adf..2dca9957a06b 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -415,7 +415,9 @@ void intel_psr_irq_handler(struct intel_dp *intel_dp, u32 psr_iir) if (DISPLAY_VER(dev_priv) >= 9) { u32 val; - val = intel_de_rmw(dev_priv, PSR_EVENT(cpu_transcoder), 0, 0); + val = intel_de_rmw(dev_priv, + PSR_EVENT(dev_priv, cpu_transcoder), + 0, 0); psr_event_print(dev_priv, val, intel_dp->psr.psr2_enabled); } diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h index 785e4f9e7828..817bc372bf35 100644 --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h @@ -195,7 +195,7 @@ #define _PSR_EVENT_TRANS_C 0x62848 #define _PSR_EVENT_TRANS_D 0x63848 #define _PSR_EVENT_TRANS_EDP 0x6f848 -#define PSR_EVENT(tran) _MMIO_TRANS2(dev_priv, tran, _PSR_EVENT_TRANS_A) +#define PSR_EVENT(dev_priv, tran) _MMIO_TRANS2(dev_priv, tran, _PSR_EVENT_TRANS_A) #define PSR_EVENT_PSR2_WD_TIMER_EXPIRE REG_BIT(17) #define PSR_EVENT_PSR2_DISABLED REG_BIT(16) #define PSR_EVENT_SU_DIRTY_FIFO_UNDERRUN REG_BIT(15)
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the PSR_EVENT register macro. Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/display/intel_psr.c | 4 +++- drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +- 2 files changed, 4 insertions(+), 2 deletions(-)