From patchwork Mon Apr 27 14:31:38 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Antoine X-Patchwork-Id: 6281271 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 7643ABF4A7 for ; Mon, 27 Apr 2015 14:33:14 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 23CD9201EC for ; Mon, 27 Apr 2015 14:32:25 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id C4044202B4 for ; Mon, 27 Apr 2015 14:31:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 32CF46E3B2; Mon, 27 Apr 2015 07:31:44 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id F013A6E3B2 for ; Mon, 27 Apr 2015 07:31:42 -0700 (PDT) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga102.jf.intel.com with ESMTP; 27 Apr 2015 07:31:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.11,657,1422950400"; d="scan'208";a="701560875" Received: from irsmsx109.ger.corp.intel.com ([163.33.3.23]) by fmsmga001.fm.intel.com with ESMTP; 27 Apr 2015 07:31:41 -0700 Received: from irsmsx102.ger.corp.intel.com ([169.254.2.145]) by IRSMSX109.ger.corp.intel.com ([169.254.13.201]) with mapi id 14.03.0224.002; Mon, 27 Apr 2015 15:31:40 +0100 From: "Antoine, Peter" To: "intel-gfx@lists.freedesktop.org" Thread-Topic: [PATCH] drm/i915: Avoid GPU hang when coming out of P3 or P4 Thread-Index: AQHQgPYu/ohhoJULDEex+jC+np5p5p1g67Lw Date: Mon, 27 Apr 2015 14:31:38 +0000 Message-ID: References: <1430144714-5101-1-git-send-email-peter.antoine@intel.com> In-Reply-To: <1430144714-5101-1-git-send-email-peter.antoine@intel.com> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [163.33.239.180] MIME-Version: 1.0 Cc: "S, Deepak" , "Tian, YeX" , "Weinehall, David" Subject: Re: [Intel-gfx] [PATCH] drm/i915: Avoid GPU hang when coming out of P3 or P4 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Ignore this. I mean S3/S4 not P3/P4. -----Original Message----- From: Antoine, Peter Sent: Monday, April 27, 2015 3:25 PM To: intel-gfx@lists.freedesktop.org Cc: S, Deepak; Weinehall, David; Tian, YeX; Antoine, Peter Subject: [PATCH] drm/i915: Avoid GPU hang when coming out of P3 or P4 This patch fixed a timing issue that causes a GPU hang when a the system comes out of power saving. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89600 Signed-off-by: Peter Antoine --- drivers/gpu/drm/i915/i915_drv.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) } mutex_unlock(&dev->struct_mutex); - /* We need working interrupts for modeset enabling ... */ - intel_runtime_pm_enable_interrupts(dev_priv); - - intel_modeset_init_hw(dev); - spin_lock_irq(&dev_priv->irq_lock); if (dev_priv->display.hpd_irq_setup) dev_priv->display.hpd_irq_setup(dev); -- 1.9.1 diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index e70adfd..648866f 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -712,6 +712,11 @@ static int i915_drm_resume(struct drm_device *dev) intel_init_pch_refclk(dev); drm_mode_config_reset(dev); + /* We need working interrupts for modeset enabling ... */ + intel_runtime_pm_enable_interrupts(dev_priv); + + intel_modeset_init_hw(dev); + mutex_lock(&dev->struct_mutex); if (i915_gem_init_hw(dev)) { DRM_ERROR("failed to re-initialize GPU, declaring wedged!\n"); @@ -719,11 +724,6 @@ static int i915_drm_resume(struct drm_device *dev)