From patchwork Fri Jul 29 09:50:02 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Antoine X-Patchwork-Id: 9252409 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 626FD60757 for ; Fri, 29 Jul 2016 09:51:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4F46127FA2 for ; Fri, 29 Jul 2016 09:51:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4182127FA4; Fri, 29 Jul 2016 09:51:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7FB8727FA2 for ; Fri, 29 Jul 2016 09:51:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9732F893AB; Fri, 29 Jul 2016 09:51:10 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id 55FC5893AB for ; Fri, 29 Jul 2016 09:50:08 +0000 (UTC) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga103.jf.intel.com with ESMTP; 29 Jul 2016 02:50:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos; i="5.28,438,1464678000"; d="scan'208"; a="1026159870" Received: from irsmsx103.ger.corp.intel.com ([163.33.3.157]) by orsmga002.jf.intel.com with ESMTP; 29 Jul 2016 02:50:03 -0700 Received: from irsmsx102.ger.corp.intel.com ([169.254.2.123]) by IRSMSX103.ger.corp.intel.com ([169.254.3.204]) with mapi id 14.03.0248.002; Fri, 29 Jul 2016 10:50:02 +0100 From: "Antoine, Peter" To: "intel-gfx@lists.freedesktop.org" Thread-Topic: [I-G-T 2/3] igt/gem_mocs_settings: adding RC6 testings Thread-Index: AQHR6Xx3/KQg+HJSP0Ga1KmlA/Y0VaAvKhYQ Date: Fri, 29 Jul 2016 09:50:02 +0000 Message-ID: References: <1469784876-33201-1-git-send-email-peter.antoine@intel.com> <1469784876-33201-3-git-send-email-peter.antoine@intel.com> In-Reply-To: <1469784876-33201-3-git-send-email-peter.antoine@intel.com> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ctpclassification: CTP_IC x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNzM0ZDdiNDQtMjBiNi00MWYyLWFlNGQtNDRkY2FiMTQzYmE5IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX0lDIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE1LjkuNi42IiwiVHJ1c3RlZExhYmVsSGFzaCI6IkpOXC8yVmFreE9PR2IzUlVRQTZvbVp1TDJGSTVUdHdwWEN3Z3A2UjVXSWtnPSJ9 x-originating-ip: [163.33.239.182] MIME-Version: 1.0 Subject: Re: [Intel-gfx] [I-G-T 2/3] igt/gem_mocs_settings: adding RC6 testings X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Please Ignore this patch. Finger trouble. Peter. -----Original Message----- From: Antoine, Peter Sent: Friday, July 29, 2016 10:35 AM To: intel-gfx@lists.freedesktop.org Cc: chris@chris-wilson.co.uk; Antoine, Peter Subject: [I-G-T 2/3] igt/gem_mocs_settings: adding RC6 testings This change adds a RC6 test for the MOCS. The MOCS registers are loaded and saved as part of the RC6 cycle but not all the registers are saved/restored. This tests that those registers are correctly restored. Signed-off-by: Peter Antoine --- tests/gem_mocs_settings.c | 56 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/tests/gem_mocs_settings.c b/tests/gem_mocs_settings.c index 4fb3a02..66d02d9 100644 --- a/tests/gem_mocs_settings.c +++ b/tests/gem_mocs_settings.c @@ -518,6 +518,59 @@ static void run_tests(unsigned mode) intel_register_access_fini(); } +static unsigned int readit(const char *path) +{ + unsigned int ret = 0; + int scanned = 0; + FILE *file; + + file = fopen(path, "r"); + igt_assert(file); + scanned = fscanf(file, "%u", &ret); + igt_assert_eq(scanned, 1); + + fclose(file); + + return ret; +} + +static int read_rc6_residency(void) +{ + unsigned int residency; + const int device = drm_get_card(); + static const char path_format[] = + "/sys/class/drm/card%d/power/rc6_residency_ms"; + char path[sizeof(path_format)]; + int ret; + + ret = snprintf(path, sizeof(path)-1, path_format, device); + + igt_assert_neq(ret, -1); + residency = readit(path); + + return residency; +} + +static void context_rc6_test(void) +{ + int fd = drm_open_driver(DRIVER_INTEL); + int res_ms; + uint32_t ctx_id = gem_context_create(fd); + + igt_debug("RC6 Context Test\n"); + check_control_registers(fd, I915_EXEC_RENDER, ctx_id, false); + check_l3cc_registers(fd, I915_EXEC_RENDER, ctx_id, false); + + res_ms = read_rc6_residency(); + sleep(3); + igt_assert_neq(res_ms, read_rc6_residency()); + + check_control_registers(fd, I915_EXEC_RENDER, ctx_id, false); + check_l3cc_registers(fd, I915_EXEC_RENDER, ctx_id, false); + close(fd); +} + + static void test_requirements(void) { int fd = drm_open_driver_master(DRIVER_INTEL); @@ -537,6 +590,9 @@ igt_main igt_subtest("mocs-settings") run_tests(NONE); + igt_subtest("mocs-rc6") + context_rc6_test(); + igt_subtest("mocs-reset") run_tests(RESET);