From patchwork Tue Aug 21 03:06:02 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Xu, Anhua" X-Patchwork-Id: 1351751 Return-Path: X-Original-To: patchwork-intel-gfx@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork1.kernel.org (Postfix) with ESMTP id E5FE03FC33 for ; Tue, 21 Aug 2012 03:07:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B3DCF9F36D for ; Mon, 20 Aug 2012 20:07:13 -0700 (PDT) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 26B269F592 for ; Mon, 20 Aug 2012 20:06:21 -0700 (PDT) Received: from azsmga002.ch.intel.com ([10.2.17.35]) by fmsmga101.fm.intel.com with ESMTP; 20 Aug 2012 20:06:20 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.77,799,1336374000"; d="scan'208,223";a="136398681" Received: from fmsmsx104.amr.corp.intel.com ([10.19.9.35]) by AZSMGA002.ch.intel.com with ESMTP; 20 Aug 2012 20:06:20 -0700 Received: from FMSMSX110.amr.corp.intel.com (10.19.9.29) by FMSMSX104.amr.corp.intel.com (10.19.9.35) with Microsoft SMTP Server (TLS) id 14.1.355.2; Mon, 20 Aug 2012 20:06:20 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by fmsmsx110.amr.corp.intel.com (10.19.9.29) with Microsoft SMTP Server (TLS) id 14.1.355.2; Mon, 20 Aug 2012 20:06:20 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.89]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.175]) with mapi id 14.01.0355.002; Tue, 21 Aug 2012 11:06:02 +0800 From: "Xu, Anhua" To: "intel-gfx@lists.freedesktop.org" Thread-Topic: [PATCH] drm/i915: fix reassignment of variable "intel_dp->DP" Thread-Index: Ac1/SeVga+qEQS67QP2Z+/B3uIfgxQ== Date: Tue, 21 Aug 2012 03:06:02 +0000 Message-ID: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH] drm/i915: fix reassignment of variable "intel_dp->DP" X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+patchwork-intel-gfx=patchwork.kernel.org@lists.freedesktop.org From 952c95621b5fd95a629c36017c36ac9e6c40e839 Mon Sep 17 00:00:00 2001 From: Anhua Xu Date: Tue, 21 Aug 2012 11:00:57 +0800 Subject: [PATCH] drm/i915: fix reassignment of variable "intel_dp->DP" This little regression was introduced by: commit 417e822deee1d2bcd8a8a60660c40a0903713f2b Author: Keith Packard Date: Tue Nov 1 19:54:11 2011 -0700 drm/i915: Treat PCH eDP like DP in most places PCH eDP has many of the same needs as regular PCH DP connections, including the DP_CTl bit settings, the TRANS_DP_CTL register. The reachable tag for this commit is: v3.1-5461-g417e822 Signed-off-by: Anhua Xu --- drivers/gpu/drm/i915/intel_dp.c | 1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index a6c426a..c060231 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -882,7 +882,6 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, * supposed to be read-only. */ intel_dp->DP = I915_READ(intel_dp->output_reg) & DP_DETECTED; - intel_dp->DP |= DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0; /* Handle DP bits in common between all three register formats */