From patchwork Mon Jul 11 20:24:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mauro Carvalho Chehab X-Patchwork-Id: 12914200 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C7FC8C43334 for ; Mon, 11 Jul 2022 20:26:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BADB790FA5; Mon, 11 Jul 2022 20:26:06 +0000 (UTC) Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by gabe.freedesktop.org (Postfix) with ESMTPS id B80972A5D5; Mon, 11 Jul 2022 20:25:29 +0000 (UTC) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 2B7C1B81236; Mon, 11 Jul 2022 20:25:26 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7D247C341D2; Mon, 11 Jul 2022 20:25:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1657571125; bh=Wdrl3GMQ6wKUQX258CDCgWdyAC2zZIfcQ4MW3qKul7w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bNXFPnHfjBfSvc9r6+4/4NPnLiMdfgU01PBPgv3Za6KPmHOwzh38YtJ8L1IXe8s4V mjFsNYJykyqd2mN31Z/DrhN8LrRmnWXBtLo7lj31aBjHL6W8ErzkwdhjZkFeJzfO2F ZKqeUYaDgDvTiPI0YPEYGaIdaFQ5ldei0zA8NrVZgLM1yxglWy5XqWHHfRnoQGlfS7 TpsKK98RKLTlf9oCfhak3vGF68fzEWraf6tITnwlfyFAlGAId25wtyviSeG/C4kJRu FWlHxicyYutCam8hKDEOAsXD22ok+QcvbGUq2lAjj9mxlv7OXLx3lYShcUW0+oDgog cEceF+prkzedw== Received: from mchehab by mail.kernel.org with local (Exim 4.95) (envelope-from ) id 1oAzy3-004e7y-H9; Mon, 11 Jul 2022 21:25:19 +0100 From: Mauro Carvalho Chehab To: Date: Mon, 11 Jul 2022 21:24:56 +0100 Message-Id: X-Mailer: git-send-email 2.36.1 In-Reply-To: References: MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 11/32] drm/i915: document kernel-doc trivial issues X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Airlie , intel-gfx@lists.freedesktop.org, Lucas De Marchi , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Rodrigo Vivi , Mauro Carvalho Chehab Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Fix those kernel-doc warnings: drivers/gpu/drm/i915/intel_region_ttm.c:199: warning: Function parameter or member 'offset' not described in 'intel_region_ttm_resource_alloc' drivers/gpu/drm/i915/i915_vma_resource.h:123: warning: Function parameter or member 'wakeref' not described in 'i915_vma_resource' drivers/gpu/drm/i915/i915_vma.c:1703: warning: Function parameter or member 'vma' not described in 'i915_vma_destroy_locked' drivers/gpu/drm/i915/i915_vma.c:751: warning: Function parameter or member 'ww' not described in 'i915_vma_insert' drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c:159: warning: Function parameter or member 'gt' not described in 'intel_gt_fini_hwconfig' drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c:146: warning: Function parameter or member 'gt' not described in 'intel_gt_init_hwconfig' drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c:113: warning: expecting prototype for intel_guc_hwconfig_init(). Prototype was for guc_hwconfig_init() instead drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c:113: warning: Function parameter or member 'gt' not described in 'guc_hwconfig_init' drivers/gpu/drm/i915/gt/intel_engine_types.h:276: warning: Function parameter or member 'preempt_hang' not described in 'intel_engine_execlists' That are due undocumented parameters. Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH 00/32] at: https://lore.kernel.org/all/cover.1657565224.git.mchehab@kernel.org/ drivers/gpu/drm/i915/gt/intel_engine_types.h | 1 + drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c | 5 ++++- drivers/gpu/drm/i915/i915_vma.c | 2 ++ drivers/gpu/drm/i915/i915_vma_resource.h | 1 + drivers/gpu/drm/i915/intel_region_ttm.c | 3 ++- 5 files changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h index 633a7e5dba3b..7c5ad9071fe7 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_types.h +++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h @@ -271,6 +271,7 @@ struct intel_engine_execlists { */ u8 csb_head; + /* private: Used only in selftests */ I915_SELFTEST_DECLARE(struct st_preempt_hang preempt_hang;) }; diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c index 4781fccc2687..76f7447302a6 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c @@ -103,7 +103,8 @@ static bool has_table(struct drm_i915_private *i915) } /** - * intel_guc_hwconfig_init - Initialize the HWConfig + * guc_hwconfig_init - Initialize the HWConfig + * @gt: GT structure * * Retrieve the HWConfig table from the GuC and save it locally. * It can then be queried on demand by other users later on. @@ -138,6 +139,7 @@ static int guc_hwconfig_init(struct intel_gt *gt) /** * intel_gt_init_hwconfig - Initialize the HWConfig if available + * @gt: GT structure * * Retrieve the HWConfig table if available on the current platform. */ @@ -151,6 +153,7 @@ int intel_gt_init_hwconfig(struct intel_gt *gt) /** * intel_gt_fini_hwconfig - Finalize the HWConfig + * @gt: GT structure * * Free up the memory allocation holding the table. */ diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c index ef3b04c7e153..ddf348c597b0 100644 --- a/drivers/gpu/drm/i915/i915_vma.c +++ b/drivers/gpu/drm/i915/i915_vma.c @@ -733,6 +733,7 @@ bool i915_gem_valid_gtt_space(struct i915_vma *vma, unsigned long color) /** * i915_vma_insert - finds a slot for the vma in its address space * @vma: the vma + * @ww: An optional struct i915_gem_ww_ctx * @size: requested size in bytes (can be larger than the VMA) * @alignment: required alignment * @flags: mask of PIN_* flags to use @@ -1675,6 +1676,7 @@ static void release_references(struct i915_vma *vma, struct intel_gt *gt, /** * i915_vma_destroy_locked - Remove all weak reference to the vma and put * the initial reference. + * @vma: VMA to destroy * * This function should be called when it's decided the vma isn't needed * anymore. The caller must assure that it doesn't race with another lookup diff --git a/drivers/gpu/drm/i915/i915_vma_resource.h b/drivers/gpu/drm/i915/i915_vma_resource.h index 14a0327b2080..a15271d96b7e 100644 --- a/drivers/gpu/drm/i915/i915_vma_resource.h +++ b/drivers/gpu/drm/i915/i915_vma_resource.h @@ -49,6 +49,7 @@ struct i915_page_sizes { * @__subtree_last: Interval tree private member. * @vm: non-refcounted pointer to the vm. This is for internal use only and * this member is cleared after vm_resource unbind. + * @wakeref: wakeref used for runtime PM reference. * @mr: The memory region of the object pointed to by the vma. * @ops: Pointer to the backend i915_vma_ops. * @private: Bind backend private info. diff --git a/drivers/gpu/drm/i915/intel_region_ttm.c b/drivers/gpu/drm/i915/intel_region_ttm.c index 62ff77445b01..5150a4f4b08d 100644 --- a/drivers/gpu/drm/i915/intel_region_ttm.c +++ b/drivers/gpu/drm/i915/intel_region_ttm.c @@ -177,7 +177,8 @@ intel_region_ttm_resource_to_rsgt(struct intel_memory_region *mem, #ifdef CONFIG_DRM_I915_SELFTEST /** * intel_region_ttm_resource_alloc - Allocate memory resources from a region - * @mem: The memory region, + * @mem: The memory region + * @offset: The range start * @size: The requested size in bytes * @flags: Allocation flags *