| Message ID | aa1279f5f04ed29b053209d49bb0137eea99119e.1730740629.git.jani.nikula@intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | drm/i915/display: convert display feature helpers to struct intel_display | expand |
On Mon, 2024-11-04 at 19:19 +0200, Jani Nikula wrote: > Convert HAS_IPS() to struct intel_display. Do minimal drive-by > conversions to struct intel_display in the callers while at it. > > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/hsw_ips.c | 4 +++- > drivers/gpu/drm/i915/display/intel_display.c | 3 ++- > drivers/gpu/drm/i915/display/intel_display_device.h | 2 +- > 3 files changed, 6 insertions(+), 3 deletions(-) > Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com> > diff --git a/drivers/gpu/drm/i915/display/hsw_ips.c b/drivers/gpu/drm/i915/display/hsw_ips.c > index 34c5d28fc866..ee815e0344e8 100644 > --- a/drivers/gpu/drm/i915/display/hsw_ips.c > +++ b/drivers/gpu/drm/i915/display/hsw_ips.c > @@ -185,7 +185,9 @@ void hsw_ips_post_update(struct intel_atomic_state *state, > /* IPS only exists on ULT machines and is tied to pipe A. */ > bool hsw_crtc_supports_ips(struct intel_crtc *crtc) > { > - return HAS_IPS(to_i915(crtc->base.dev)) && crtc->pipe == PIPE_A; > + struct intel_display *display = to_intel_display(crtc); > + > + return HAS_IPS(display) && crtc->pipe == PIPE_A; > } > > bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state) > diff --git a/drivers/gpu/drm/i915/display/intel_display.c > b/drivers/gpu/drm/i915/display/intel_display.c > index 57b42554d656..f53611e83502 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -4545,6 +4545,7 @@ static int hsw_compute_linetime_wm(struct intel_atomic_state *state, > static int intel_crtc_atomic_check(struct intel_atomic_state *state, > struct intel_crtc *crtc) > { > + struct intel_display *display = to_intel_display(crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > struct intel_crtc_state *crtc_state = > intel_atomic_get_new_crtc_state(state, crtc); > @@ -4586,7 +4587,7 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state, > return ret; > } > > - if (HAS_IPS(dev_priv)) { > + if (HAS_IPS(display)) { > ret = hsw_ips_compute_config(state, crtc); > if (ret) > return ret; > diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h > b/drivers/gpu/drm/i915/display/intel_display_device.h > index 6279c6c6e831..b85b1d3ff708 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_device.h > +++ b/drivers/gpu/drm/i915/display/intel_display_device.h > @@ -164,7 +164,7 @@ struct intel_display_platforms { > #define HAS_GMCH(i915) (DISPLAY_INFO(i915)->has_gmch) > #define HAS_HW_SAGV_WM(i915) (DISPLAY_VER(i915) >= 13 && !IS_DGFX(i915)) > #define HAS_IPC(i915) (DISPLAY_INFO(i915)->has_ipc) > -#define HAS_IPS(i915) (IS_HASWELL_ULT(i915) || IS_BROADWELL(i915)) > +#define HAS_IPS(__display) ((__display)->platform.haswell_ult || (__display)- > >platform.broadwell) > #define HAS_LRR(i915) (DISPLAY_VER(i915) >= 12) > #define HAS_LSPCON(i915) (IS_DISPLAY_VER(i915, 9, 10)) > #define HAS_MBUS_JOINING(i915) (IS_ALDERLAKE_P(i915) || DISPLAY_VER(i915) >= 14)
On Mon, Nov 04, 2024 at 07:19:21PM +0200, Jani Nikula wrote: > Convert HAS_IPS() to struct intel_display. Do minimal drive-by > conversions to struct intel_display in the callers while at it. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/hsw_ips.c | 4 +++- > drivers/gpu/drm/i915/display/intel_display.c | 3 ++- > drivers/gpu/drm/i915/display/intel_display_device.h | 2 +- > 3 files changed, 6 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/hsw_ips.c b/drivers/gpu/drm/i915/display/hsw_ips.c > index 34c5d28fc866..ee815e0344e8 100644 > --- a/drivers/gpu/drm/i915/display/hsw_ips.c > +++ b/drivers/gpu/drm/i915/display/hsw_ips.c > @@ -185,7 +185,9 @@ void hsw_ips_post_update(struct intel_atomic_state *state, > /* IPS only exists on ULT machines and is tied to pipe A. */ > bool hsw_crtc_supports_ips(struct intel_crtc *crtc) > { > - return HAS_IPS(to_i915(crtc->base.dev)) && crtc->pipe == PIPE_A; > + struct intel_display *display = to_intel_display(crtc); > + > + return HAS_IPS(display) && crtc->pipe == PIPE_A; > } > > bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state) > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index 57b42554d656..f53611e83502 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -4545,6 +4545,7 @@ static int hsw_compute_linetime_wm(struct intel_atomic_state *state, > static int intel_crtc_atomic_check(struct intel_atomic_state *state, > struct intel_crtc *crtc) > { > + struct intel_display *display = to_intel_display(crtc); > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); > struct intel_crtc_state *crtc_state = > intel_atomic_get_new_crtc_state(state, crtc); > @@ -4586,7 +4587,7 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state, > return ret; > } > > - if (HAS_IPS(dev_priv)) { > + if (HAS_IPS(display)) { > ret = hsw_ips_compute_config(state, crtc); > if (ret) > return ret; > diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h > index 6279c6c6e831..b85b1d3ff708 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_device.h > +++ b/drivers/gpu/drm/i915/display/intel_display_device.h > @@ -164,7 +164,7 @@ struct intel_display_platforms { > #define HAS_GMCH(i915) (DISPLAY_INFO(i915)->has_gmch) > #define HAS_HW_SAGV_WM(i915) (DISPLAY_VER(i915) >= 13 && !IS_DGFX(i915)) > #define HAS_IPC(i915) (DISPLAY_INFO(i915)->has_ipc) > -#define HAS_IPS(i915) (IS_HASWELL_ULT(i915) || IS_BROADWELL(i915)) > +#define HAS_IPS(__display) ((__display)->platform.haswell_ult || (__display)->platform.broadwell) > #define HAS_LRR(i915) (DISPLAY_VER(i915) >= 12) > #define HAS_LSPCON(i915) (IS_DISPLAY_VER(i915, 9, 10)) > #define HAS_MBUS_JOINING(i915) (IS_ALDERLAKE_P(i915) || DISPLAY_VER(i915) >= 14) > -- > 2.39.5 >
diff --git a/drivers/gpu/drm/i915/display/hsw_ips.c b/drivers/gpu/drm/i915/display/hsw_ips.c index 34c5d28fc866..ee815e0344e8 100644 --- a/drivers/gpu/drm/i915/display/hsw_ips.c +++ b/drivers/gpu/drm/i915/display/hsw_ips.c @@ -185,7 +185,9 @@ void hsw_ips_post_update(struct intel_atomic_state *state, /* IPS only exists on ULT machines and is tied to pipe A. */ bool hsw_crtc_supports_ips(struct intel_crtc *crtc) { - return HAS_IPS(to_i915(crtc->base.dev)) && crtc->pipe == PIPE_A; + struct intel_display *display = to_intel_display(crtc); + + return HAS_IPS(display) && crtc->pipe == PIPE_A; } bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 57b42554d656..f53611e83502 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -4545,6 +4545,7 @@ static int hsw_compute_linetime_wm(struct intel_atomic_state *state, static int intel_crtc_atomic_check(struct intel_atomic_state *state, struct intel_crtc *crtc) { + struct intel_display *display = to_intel_display(crtc); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); @@ -4586,7 +4587,7 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state, return ret; } - if (HAS_IPS(dev_priv)) { + if (HAS_IPS(display)) { ret = hsw_ips_compute_config(state, crtc); if (ret) return ret; diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h index 6279c6c6e831..b85b1d3ff708 100644 --- a/drivers/gpu/drm/i915/display/intel_display_device.h +++ b/drivers/gpu/drm/i915/display/intel_display_device.h @@ -164,7 +164,7 @@ struct intel_display_platforms { #define HAS_GMCH(i915) (DISPLAY_INFO(i915)->has_gmch) #define HAS_HW_SAGV_WM(i915) (DISPLAY_VER(i915) >= 13 && !IS_DGFX(i915)) #define HAS_IPC(i915) (DISPLAY_INFO(i915)->has_ipc) -#define HAS_IPS(i915) (IS_HASWELL_ULT(i915) || IS_BROADWELL(i915)) +#define HAS_IPS(__display) ((__display)->platform.haswell_ult || (__display)->platform.broadwell) #define HAS_LRR(i915) (DISPLAY_VER(i915) >= 12) #define HAS_LSPCON(i915) (IS_DISPLAY_VER(i915, 9, 10)) #define HAS_MBUS_JOINING(i915) (IS_ALDERLAKE_P(i915) || DISPLAY_VER(i915) >= 14)
Convert HAS_IPS() to struct intel_display. Do minimal drive-by conversions to struct intel_display in the callers while at it. Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/display/hsw_ips.c | 4 +++- drivers/gpu/drm/i915/display/intel_display.c | 3 ++- drivers/gpu/drm/i915/display/intel_display_device.h | 2 +- 3 files changed, 6 insertions(+), 3 deletions(-)