diff mbox series

[3/5] drm/i915/dsi: add LP_CLOCK_DURING_LPM bit for DSI_TRANS_FUNC_CONF

Message ID c5d812efc59081a0f65cb821d1b42ab3508a45a0.1733409899.git.jani.nikula@intel.com (mailing list archive)
State New
Headers show
Series drm/i915/dsi: add some missing dphy configuration | expand

Commit Message

Jani Nikula Dec. 5, 2024, 2:45 p.m. UTC
We're missing the definition for LP_CLOCK_DURING_LPM. Add it.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/icl_dsi_regs.h | 1 +
 1 file changed, 1 insertion(+)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/icl_dsi_regs.h b/drivers/gpu/drm/i915/display/icl_dsi_regs.h
index 88df1da8ccfd..d47a799aad75 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi_regs.h
+++ b/drivers/gpu/drm/i915/display/icl_dsi_regs.h
@@ -222,6 +222,7 @@ 
 #define   CLK_ENTER_LP_AFTER_DATA	REG_FIELD_PREP(CONTINUOUS_CLK_MASK, 0)
 #define   CLK_HS_OR_LP			REG_FIELD_PREP(CONTINUOUS_CLK_MASK, 2)
 #define   CLK_HS_CONTINUOUS		REG_FIELD_PREP(CONTINUOUS_CLK_MASK, 3)
+#define   LP_CLOCK_DURING_LPM		REG_BIT(7)
 #define   LINK_CALIBRATION_MASK		REG_GENMASK(5, 4)
 #define   CALIBRATION_DISABLED			REG_FIELD_PREP(LINK_CALIBRATION_MASK, 0)
 #define   CALIBRATION_ENABLED_INITIAL_ONLY	REG_FIELD_PREP(LINK_CALIBRATION_MASK, 2)