| Message ID | d9a7ef1ff8e848cd10729f4ee033d1ef55ee78cc.1717514638.git.jani.nikula@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: finish the job of removing implicit dev_priv | expand |
On Tue, Jun 04, 2024 at 06:25:42PM +0300, Jani Nikula wrote: > Avoid the implicit dev_priv local variable use, and pass dev_priv > explicitly to the ICL_PIPESTATUS register macro. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> > > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_fifo_underrun.c | 9 ++++++--- > drivers/gpu/drm/i915/i915_reg.h | 2 +- > 2 files changed, 7 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c > index 401726f466c0..e5e4ca7cc499 100644 > --- a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c > +++ b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c > @@ -209,7 +209,8 @@ static void bdw_set_fifo_underrun_reporting(struct drm_device *dev, > > if (enable) { > if (DISPLAY_VER(dev_priv) >= 11) > - intel_de_write(dev_priv, ICL_PIPESTATUS(pipe), > + intel_de_write(dev_priv, > + ICL_PIPESTATUS(dev_priv, pipe), > icl_pipe_status_underrun_mask(dev_priv)); > > bdw_enable_pipe_irq(dev_priv, pipe, mask); > @@ -418,9 +419,11 @@ void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv, > * the underrun was caused by the downstream port. > */ > if (DISPLAY_VER(dev_priv) >= 11) { > - underruns = intel_de_read(dev_priv, ICL_PIPESTATUS(pipe)) & > + underruns = intel_de_read(dev_priv, > + ICL_PIPESTATUS(dev_priv, pipe)) & > icl_pipe_status_underrun_mask(dev_priv); > - intel_de_write(dev_priv, ICL_PIPESTATUS(pipe), underruns); > + intel_de_write(dev_priv, ICL_PIPESTATUS(dev_priv, pipe), > + underruns); > } > > if (intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false)) { > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 1b2c0d650bff..cbe109973f57 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -1927,7 +1927,7 @@ > #define PIPE_MISC2(pipe) _MMIO_PIPE(pipe, _PIPE_MISC2_A, _PIPE_MISC2_B) > > #define _ICL_PIPE_A_STATUS 0x70058 > -#define ICL_PIPESTATUS(pipe) _MMIO_PIPE2(dev_priv, pipe, _ICL_PIPE_A_STATUS) > +#define ICL_PIPESTATUS(dev_priv, pipe) _MMIO_PIPE2(dev_priv, pipe, _ICL_PIPE_A_STATUS) > #define PIPE_STATUS_UNDERRUN REG_BIT(31) > #define PIPE_STATUS_SOFT_UNDERRUN_XELPD REG_BIT(28) > #define PIPE_STATUS_HARD_UNDERRUN_XELPD REG_BIT(27) > -- > 2.39.2 >
diff --git a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c index 401726f466c0..e5e4ca7cc499 100644 --- a/drivers/gpu/drm/i915/display/intel_fifo_underrun.c +++ b/drivers/gpu/drm/i915/display/intel_fifo_underrun.c @@ -209,7 +209,8 @@ static void bdw_set_fifo_underrun_reporting(struct drm_device *dev, if (enable) { if (DISPLAY_VER(dev_priv) >= 11) - intel_de_write(dev_priv, ICL_PIPESTATUS(pipe), + intel_de_write(dev_priv, + ICL_PIPESTATUS(dev_priv, pipe), icl_pipe_status_underrun_mask(dev_priv)); bdw_enable_pipe_irq(dev_priv, pipe, mask); @@ -418,9 +419,11 @@ void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv, * the underrun was caused by the downstream port. */ if (DISPLAY_VER(dev_priv) >= 11) { - underruns = intel_de_read(dev_priv, ICL_PIPESTATUS(pipe)) & + underruns = intel_de_read(dev_priv, + ICL_PIPESTATUS(dev_priv, pipe)) & icl_pipe_status_underrun_mask(dev_priv); - intel_de_write(dev_priv, ICL_PIPESTATUS(pipe), underruns); + intel_de_write(dev_priv, ICL_PIPESTATUS(dev_priv, pipe), + underruns); } if (intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false)) { diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 1b2c0d650bff..cbe109973f57 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1927,7 +1927,7 @@ #define PIPE_MISC2(pipe) _MMIO_PIPE(pipe, _PIPE_MISC2_A, _PIPE_MISC2_B) #define _ICL_PIPE_A_STATUS 0x70058 -#define ICL_PIPESTATUS(pipe) _MMIO_PIPE2(dev_priv, pipe, _ICL_PIPE_A_STATUS) +#define ICL_PIPESTATUS(dev_priv, pipe) _MMIO_PIPE2(dev_priv, pipe, _ICL_PIPE_A_STATUS) #define PIPE_STATUS_UNDERRUN REG_BIT(31) #define PIPE_STATUS_SOFT_UNDERRUN_XELPD REG_BIT(28) #define PIPE_STATUS_HARD_UNDERRUN_XELPD REG_BIT(27)
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the ICL_PIPESTATUS register macro. Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/display/intel_fifo_underrun.c | 9 ++++++--- drivers/gpu/drm/i915/i915_reg.h | 2 +- 2 files changed, 7 insertions(+), 4 deletions(-)