diff mbox series

[01/19] drm/i915: pass dev_priv explicitly to TRANS_EXITLINE

Message ID eb1e5fe155daf2d271af76e683a1f3f33e34403a.1714471597.git.jani.nikula@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915/psr: implicit dev_priv removal | expand

Commit Message

Jani Nikula April 30, 2024, 10:09 a.m. UTC
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the TRANS_EXITLINE register macro.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c      | 7 +++++--
 drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +-
 2 files changed, 6 insertions(+), 3 deletions(-)

Comments

Rodrigo Vivi May 1, 2024, 2:05 a.m. UTC | #1
On Tue, Apr 30, 2024 at 01:09:55PM +0300, Jani Nikula wrote:
> Avoid the implicit dev_priv local variable use, and pass dev_priv
> explicitly to the TRANS_EXITLINE register macro.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_psr.c      | 7 +++++--
>  drivers/gpu/drm/i915/display/intel_psr_regs.h | 2 +-
>  2 files changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index f5b33335a9ae..1cbd8c6714b1 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1685,7 +1685,8 @@ void intel_psr_get_config(struct intel_encoder *encoder,
>  	}
>  
>  	if (DISPLAY_VER(dev_priv) >= 12) {
> -		val = intel_de_read(dev_priv, TRANS_EXITLINE(cpu_transcoder));
> +		val = intel_de_read(dev_priv,
> +				    TRANS_EXITLINE(dev_priv, cpu_transcoder));
>  		pipe_config->dc3co_exitline = REG_FIELD_GET(EXITLINE_MASK, val);
>  	}
>  unlock:
> @@ -1877,7 +1878,9 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp,
>  	 * transcoder, EXITLINE will need to be unset when disabling PSR
>  	 */
>  	if (intel_dp->psr.dc3co_exitline)
> -		intel_de_rmw(dev_priv, TRANS_EXITLINE(cpu_transcoder), EXITLINE_MASK,
> +		intel_de_rmw(dev_priv,
> +			     TRANS_EXITLINE(dev_priv, cpu_transcoder),
> +			     EXITLINE_MASK,
>  			     intel_dp->psr.dc3co_exitline << EXITLINE_SHIFT | EXITLINE_ENABLE);
>  
>  	if (HAS_PSR_HW_TRACKING(dev_priv) && HAS_PSR2_SEL_FETCH(dev_priv))
> diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> index ebc22999572c..0e0c71ea9fe3 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
> @@ -9,7 +9,7 @@
>  #include "intel_display_reg_defs.h"
>  #include "intel_dp_aux_regs.h"
>  
> -#define TRANS_EXITLINE(trans)	_MMIO_TRANS2(dev_priv, (trans), _TRANS_EXITLINE_A)
> +#define TRANS_EXITLINE(dev_priv, trans)	_MMIO_TRANS2(dev_priv, (trans), _TRANS_EXITLINE_A)
>  #define   EXITLINE_ENABLE	REG_BIT(31)
>  #define   EXITLINE_MASK		REG_GENMASK(12, 0)
>  #define   EXITLINE_SHIFT	0
> -- 
> 2.39.2
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index f5b33335a9ae..1cbd8c6714b1 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1685,7 +1685,8 @@  void intel_psr_get_config(struct intel_encoder *encoder,
 	}
 
 	if (DISPLAY_VER(dev_priv) >= 12) {
-		val = intel_de_read(dev_priv, TRANS_EXITLINE(cpu_transcoder));
+		val = intel_de_read(dev_priv,
+				    TRANS_EXITLINE(dev_priv, cpu_transcoder));
 		pipe_config->dc3co_exitline = REG_FIELD_GET(EXITLINE_MASK, val);
 	}
 unlock:
@@ -1877,7 +1878,9 @@  static void intel_psr_enable_source(struct intel_dp *intel_dp,
 	 * transcoder, EXITLINE will need to be unset when disabling PSR
 	 */
 	if (intel_dp->psr.dc3co_exitline)
-		intel_de_rmw(dev_priv, TRANS_EXITLINE(cpu_transcoder), EXITLINE_MASK,
+		intel_de_rmw(dev_priv,
+			     TRANS_EXITLINE(dev_priv, cpu_transcoder),
+			     EXITLINE_MASK,
 			     intel_dp->psr.dc3co_exitline << EXITLINE_SHIFT | EXITLINE_ENABLE);
 
 	if (HAS_PSR_HW_TRACKING(dev_priv) && HAS_PSR2_SEL_FETCH(dev_priv))
diff --git a/drivers/gpu/drm/i915/display/intel_psr_regs.h b/drivers/gpu/drm/i915/display/intel_psr_regs.h
index ebc22999572c..0e0c71ea9fe3 100644
--- a/drivers/gpu/drm/i915/display/intel_psr_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_psr_regs.h
@@ -9,7 +9,7 @@ 
 #include "intel_display_reg_defs.h"
 #include "intel_dp_aux_regs.h"
 
-#define TRANS_EXITLINE(trans)	_MMIO_TRANS2(dev_priv, (trans), _TRANS_EXITLINE_A)
+#define TRANS_EXITLINE(dev_priv, trans)	_MMIO_TRANS2(dev_priv, (trans), _TRANS_EXITLINE_A)
 #define   EXITLINE_ENABLE	REG_BIT(31)
 #define   EXITLINE_MASK		REG_GENMASK(12, 0)
 #define   EXITLINE_SHIFT	0