diff mbox series

drm/i915: Fix spelling typo in comment

Message ID tencent_7B226C4A9BC2B5EEB37B70C188B5015D290A@qq.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: Fix spelling typo in comment | expand

Commit Message

1064094935 June 16, 2022, 7:08 a.m. UTC
From: pengfuyuan <pengfuyuan@kylinos.cn>

Fix spelling typo in comment.

Reported-by: k2ci <kernel-bot@kylinos.cn>
Signed-off-by: pengfuyuan <pengfuyuan@kylinos.cn>
---
 drivers/gpu/drm/i915/gem/i915_gem_tiling.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Tvrtko Ursulin June 22, 2022, 6:53 a.m. UTC | #1
On 16/06/2022 08:08, 1064094935@qq.com wrote:
> From: pengfuyuan <pengfuyuan@kylinos.cn>
> 
> Fix spelling typo in comment.
> 
> Reported-by: k2ci <kernel-bot@kylinos.cn>
> Signed-off-by: pengfuyuan <pengfuyuan@kylinos.cn>
> ---
>   drivers/gpu/drm/i915/gem/i915_gem_tiling.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c
> index 80ac0db1ae8c..85518b28cd72 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c
> @@ -114,7 +114,7 @@ u32 i915_gem_fence_alignment(struct drm_i915_private *i915, u32 size,
>   	return i915_gem_fence_size(i915, size, tiling, stride);
>   }
>   
> -/* Check pitch constriants for all chips & tiling formats */
> +/* Check pitch constraints for all chips & tiling formats */
>   static bool
>   i915_tiling_ok(struct drm_i915_gem_object *obj,
>   	       unsigned int tiling, unsigned int stride)

Merged to drm-intel-gt-next - thanks for the patch!

Regards,

Tvrtko
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c
index 80ac0db1ae8c..85518b28cd72 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c
@@ -114,7 +114,7 @@  u32 i915_gem_fence_alignment(struct drm_i915_private *i915, u32 size,
 	return i915_gem_fence_size(i915, size, tiling, stride);
 }
 
-/* Check pitch constriants for all chips & tiling formats */
+/* Check pitch constraints for all chips & tiling formats */
 static bool
 i915_tiling_ok(struct drm_i915_gem_object *obj,
 	       unsigned int tiling, unsigned int stride)