| Message ID | 20220421110326.856-9-cathy.zhang@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Support microcode updates affecting SGX | expand |
On Thu, Apr 21, 2022 at 07:03:25PM +0800, Cathy Zhang wrote: > diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h > index d6bfdfb0f0af..ec12392af371 100644 > --- a/arch/x86/include/asm/microcode.h > +++ b/arch/x86/include/asm/microcode.h > @@ -3,6 +3,7 @@ > #define _ASM_X86_MICROCODE_H > > #include <asm/cpu.h> > +#include <asm/sgx.h> That include looks like a leftover.
Hi Boris, > -----Original Message----- > From: Borislav Petkov <bp@alien8.de> > Sent: Thursday, April 21, 2022 8:07 PM > To: Zhang, Cathy <cathy.zhang@intel.com> > Cc: linux-sgx@vger.kernel.org; x86@kernel.org; jarkko@kernel.org; Chatre, > Reinette <reinette.chatre@intel.com>; Hansen, Dave > <dave.hansen@intel.com>; Raj, Ashok <ashok.raj@intel.com>; Peng, Chao P > <chao.p.peng@intel.com>; Zhong, Yang <yang.zhong@intel.com> > Subject: Re: [PATCH v4 8/9] x86/cpu: Call ENCLS[EUPDATESVN] procedure in > microcode update > > On Thu, Apr 21, 2022 at 07:03:25PM +0800, Cathy Zhang wrote: > > diff --git a/arch/x86/include/asm/microcode.h > b/arch/x86/include/asm/microcode.h > > index d6bfdfb0f0af..ec12392af371 100644 > > --- a/arch/x86/include/asm/microcode.h > > +++ b/arch/x86/include/asm/microcode.h > > @@ -3,6 +3,7 @@ > > #define _ASM_X86_MICROCODE_H > > > > #include <asm/cpu.h> > > +#include <asm/sgx.h> > > That include looks like a leftover. Yep, it is. I've removed. Thanks for pointing out! I will pay more attention in future. > > -- > Regards/Gruss, > Boris. > > https://people.kernel.org/tglx/notes-about-netiquette
diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h index d6bfdfb0f0af..ec12392af371 100644 --- a/arch/x86/include/asm/microcode.h +++ b/arch/x86/include/asm/microcode.h @@ -3,6 +3,7 @@ #define _ASM_X86_MICROCODE_H #include <asm/cpu.h> +#include <asm/sgx.h> #include <linux/earlycpio.h> #include <linux/initrd.h> diff --git a/arch/x86/include/asm/sgx.h b/arch/x86/include/asm/sgx.h index 74bcb6841a4b..1321670a6338 100644 --- a/arch/x86/include/asm/sgx.h +++ b/arch/x86/include/asm/sgx.h @@ -409,4 +409,10 @@ int sgx_virt_einit(void __user *sigstruct, void __user *token, int sgx_set_attribute(unsigned long *allowed_attributes, unsigned int attribute_fd); +#ifdef CONFIG_X86_SGX +extern void sgx_update_cpusvn_intel(void); +#else +static inline void sgx_update_cpusvn_intel(void) {} +#endif + #endif /* _ASM_X86_SGX_H */ diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 7b8382c11788..41bed20b586d 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -59,6 +59,7 @@ #include <asm/cpu_device_id.h> #include <asm/uv/uv.h> #include <asm/sigframe.h> +#include <asm/sgx.h> #include "cpu.h" @@ -2086,6 +2087,15 @@ void microcode_check(void) perf_check_microcode(); + /* + * SGX attestation incorporates the microcode versions of all processors + * on the system and is affected by microcode updates. So, update SGX + * attestation metric (called CPUSVN) to ensure enclaves attest to the + * new version after microcode update. + */ + if (IS_ENABLED(CONFIG_X86_SGX) && (cpuid_eax(SGX_CPUID) & SGX_CPUID_EUPDATESVN)) + sgx_update_cpusvn_intel(); + /* Reload CPUID max function as it might've changed. */ info.cpuid_level = cpuid_eax(0); diff --git a/arch/x86/kernel/cpu/sgx/main.c b/arch/x86/kernel/cpu/sgx/main.c index fbb093c9fe1a..20be96a79cc1 100644 --- a/arch/x86/kernel/cpu/sgx/main.c +++ b/arch/x86/kernel/cpu/sgx/main.c @@ -1409,3 +1409,15 @@ static int sgx_updatesvn(void) return ret; } + +void sgx_update_cpusvn_intel(void) +{ + sgx_lock_epc(); + if (sgx_zap_pages()) + goto out; + + sgx_updatesvn(); + +out: + sgx_unlock_epc(); +}
EUPDATESVN is the SGX instruction which allows enclave attestation to include information about updated microcode without a reboot. Microcode updates which affect SGX require two phases: 1. Do the main microcode update 2. Make the new CPUSVN available for enclave attestation via EUPDATESVN. Before a EUPDATESVN can succeed, all enclave pages (EPC) must be marked as unused in the SGX metadata (EPCM). This operation destroys all preexisting SGX enclave data and metadata. This is by design and mitigates the impact of vulnerabilities that may have compromised enclaves or the SGX hardware itself prior to the update. Signed-off-by: Cathy Zhang <cathy.zhang@intel.com> --- Changes since v3: - Rename update_cpusvn_intel() as sgx_update_cpusvn_intel(). (Dave Hansen) - Refine the comments when sgx_update_cpusvn_intel() is called by microcode_check(). (Borislav Petkov, Dave Hansen) - Define both the 'static inline' stub *and* the declaration for sgx_update_cpusvn_intel() in sgx.h. (Dave Hansen) Changes since v1: - Remove the sysfs file svnupdate. (Thomas Gleixner, Dave Hansen) - Let late microcode load path call ENCLS[EUPDATESVN] procedure directly. (Borislav Petkov) - Redefine update_cpusvn_intel() to return void instead of int. --- arch/x86/include/asm/microcode.h | 1 + arch/x86/include/asm/sgx.h | 6 ++++++ arch/x86/kernel/cpu/common.c | 10 ++++++++++ arch/x86/kernel/cpu/sgx/main.c | 12 ++++++++++++ 4 files changed, 29 insertions(+)