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[34.92.144.28]) by smtp.gmail.com with ESMTPSA id y10sm5470110pfb.53.2020.04.24.04.06.26 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 24 Apr 2020 04:06:28 -0700 (PDT) From: Huacai Chen To: Paolo Bonzini , Thomas Bogendoerfer Cc: kvm@vger.kernel.org, linux-mips@vger.kernel.org, Fuxin Zhang , Huacai Chen , Jiaxun Yang , Huacai Chen Subject: [PATCH V2 00/14] KVM: MIPS: Add Loongson-3 support (Host Side) Date: Fri, 24 Apr 2020 19:15:19 +0800 Message-Id: <1587726933-31757-1-git-send-email-chenhc@lemote.com> X-Mailer: git-send-email 2.7.0 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org We are preparing to add KVM support for Loongson-3. VZ extension is fully supported in Loongson-3A R4+, and we will not care about old CPUs (at least now). We already have a full functional Linux kernel (based on Linux-5.4.x LTS) and QEMU (based on 5.0.0-rc2) and their git repositories are here: QEMU: https://github.com/chenhuacai/qemu Kernel: https://github.com/chenhuacai/linux Of course these two repositories need to be rework and not suitable for upstream (especially the commits need to be splitted). We show them here is just to tell others what we have done, and how KVM/Loongson will look like. Our plan is make the KVM host side be upstream first, and after that, we will make the KVM guest side and QEMU emulator be upstream. V1 -> V2: 1, Remove "mips: define pud_index() regardless of page table folding" because it has been applied. 2, Make Loongson-specific code be guarded by CONFIG_CPU_LOONGSON64. Xing Li(2): KVM: MIPS: Define KVM_ENTRYHI_ASID to cpu_asid_mask(&boot_cpu_data) KVM: MIPS: Fix VPN2_MASK definition for variable cpu_vmbits Huacai Chen(12): KVM: MIPS: Increase KVM_MAX_VCPUS and KVM_USER_MEM_SLOTS to 16 KVM: MIPS: Add EVENTFD support which is needed by VHOST KVM: MIPS: Use lddir/ldpte instructions to lookup gpa_mm.pgd KVM: MIPS: Introduce and use cpu_guest_has_ldpte KVM: MIPS: Use root tlb to control guest's CCA for Loongson-3 KVM: MIPS: Let indexed cacheops cause guest exit on Loongson-3 KVM: MIPS: Add more types of virtual interrupts KVM: MIPS: Add Loongson-3 Virtual IPI interrupt support KVM: MIPS: Add CPUCFG emulation for Loongson-3 KVM: MIPS: Add CONFIG6 and DIAG registers emulation KVM: MIPS: Add more MMIO load/store instructions emulation KVM: MIPS: Enable KVM support for Loongson-3 Signed-off-by: Huacai Chen --- arch/mips/Kconfig | 1 + arch/mips/include/asm/cpu-features.h | 3 + arch/mips/include/asm/kvm_host.h | 52 +++- arch/mips/include/asm/mipsregs.h | 7 + arch/mips/include/uapi/asm/inst.h | 11 + arch/mips/kernel/cpu-probe.c | 2 + arch/mips/kvm/Kconfig | 1 + arch/mips/kvm/Makefile | 5 +- arch/mips/kvm/emulate.c | 461 ++++++++++++++++++++++++++++++++++- arch/mips/kvm/entry.c | 19 +- arch/mips/kvm/interrupt.c | 93 +------ arch/mips/kvm/interrupt.h | 14 +- arch/mips/kvm/loongson_ipi.c | 215 ++++++++++++++++ arch/mips/kvm/mips.c | 49 +++- arch/mips/kvm/tlb.c | 41 ++++ arch/mips/kvm/trap_emul.c | 3 + arch/mips/kvm/vz.c | 210 +++++++++++----- 17 files changed, 1021 insertions(+), 166 deletions(-) create mode 100644 arch/mips/kvm/loongson_ipi.c -- 2.7.0