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Thu, 25 Mar 2021 09:39:08 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A1E9D11C066; Thu, 25 Mar 2021 09:39:08 +0000 (GMT) Received: from oc3016276355.ibm.com (unknown [9.145.41.31]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 25 Mar 2021 09:39:08 +0000 (GMT) From: Pierre Morel To: kvm@vger.kernel.org Cc: frankja@linux.ibm.com, david@redhat.com, thuth@redhat.com, cohuck@redhat.com, imbrenda@linux.ibm.com Subject: [kvm-unit-tests PATCH v2 0/8] Testing SSCH, CSCH and HSCH for errors Date: Thu, 25 Mar 2021 10:38:59 +0100 Message-Id: <1616665147-32084-1-git-send-email-pmorel@linux.ibm.com> X-Mailer: git-send-email 1.8.3.1 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369,18.0.761 definitions=2021-03-25_02:2021-03-24,2021-03-25 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=0 mlxscore=0 clxscore=1015 priorityscore=1501 malwarescore=0 adultscore=0 impostorscore=0 bulkscore=0 phishscore=0 mlxlogscore=999 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2103250072 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The goal of this series is to test some of the I/O instructions, SSCH, CSCH and HSCH for errors like invalid parameters, addressing, timing etc. We can not test the sending of an instruction before the last instruction has been proceeded by QEMU due to the QEMU serialization but we can check the behavior of an instruction if it is started before the status of the last instruction is read. To do this we first separate the waiting for the interruption and the checking of the IRB and enable the subchannel without an I/O ISC to avoid interruptions at this subchannel and second, we add an argument to the routine in charge to check the IRB representing the expected SCSW control field of the IRB. We also need several other enhancements to the testing environment: - definitions for the SCSW control bits - a new function to disable a subchannel - a macro to simplify skiping tests when no device is present (I know the warning about return in macro, can we accept it?) In the new tests we assume that all the test preparation is working and use asserts for all function for which we do not expect a failure. regards, Pierre Pierre Morel (8): s390x: lib: css: disabling a subchannel s390x: lib: css: SCSW bit definitions s390x: css: simplify skipping tests on no device s390x: lib: css: separate wait for IRQ and check I/O completion s390x: lib: css: add SCSW ctrl expectations to check I/O completion s390x: css: testing ssch error response s390x: css: testing halt subchannel s390x: css: testing clear subchannel lib/s390x/css.h | 35 +++++- lib/s390x/css_lib.c | 104 ++++++++++++++++-- s390x/css.c | 251 ++++++++++++++++++++++++++++++++++++++++---- 3 files changed, 363 insertions(+), 27 deletions(-)